Searched refs:disablePass (Results 1 – 5 of 5) sorted by relevance
282 disablePass(&PrologEpilogCodeInserterID); in addIRPasses()283 disablePass(&MachineCopyPropagationID); in addIRPasses()284 disablePass(&TailDuplicateID); in addIRPasses()285 disablePass(&StackMapLivenessID); in addIRPasses()286 disablePass(&LiveDebugValuesID); in addIRPasses()287 disablePass(&PostRAMachineSinkingID); in addIRPasses()288 disablePass(&PostRASchedulerID); in addIRPasses()289 disablePass(&FuncletLayoutID); in addIRPasses()290 disablePass(&PatchableFunctionID); in addIRPasses()291 disablePass(&ShrinkWrapID); in addIRPasses()
426 disablePass(&MachineCopyPropagationID); in addPostRegAlloc()427 disablePass(&PostRAMachineSinkingID); in addPostRegAlloc()428 disablePass(&PostRASchedulerID); in addPostRegAlloc()429 disablePass(&FuncletLayoutID); in addPostRegAlloc()430 disablePass(&StackMapLivenessID); in addPostRegAlloc()431 disablePass(&LiveDebugValuesID); in addPostRegAlloc()432 disablePass(&PatchableFunctionID); in addPostRegAlloc()433 disablePass(&ShrinkWrapID); in addPostRegAlloc()437 disablePass(&MachineBlockPlacementID); in addPostRegAlloc()
742 disablePass(&StackMapLivenessID); in AMDGPUPassConfig()743 disablePass(&FuncletLayoutID); in AMDGPUPassConfig()856 disablePass(&StackMapLivenessID); in addIRPasses()857 disablePass(&FuncletLayoutID); in addIRPasses()858 disablePass(&PatchableFunctionID); in addIRPasses()
197 void disablePass(AnalysisID PassID) { in disablePass() function
227 void disablePass(AnalysisKey *ID) { in disablePass() function