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Searched refs:cpu_transcoder (Results 1 – 17 of 17) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/display/
H A Dintel_hdcp.c120 enum transcoder cpu_transcoder, enum port port) in intel_hdcp_in_use() argument
122 return I915_READ(HDCP_STATUS(dev_priv, cpu_transcoder, port)) & in intel_hdcp_in_use()
128 enum transcoder cpu_transcoder, enum port port) in intel_hdcp2_in_use() argument
130 return I915_READ(HDCP2_STATUS(dev_priv, cpu_transcoder, port)) & in intel_hdcp2_in_use()
263 enum transcoder cpu_transcoder, enum port port) in intel_hdcp_get_repeater_ctl() argument
266 switch (cpu_transcoder) { in intel_hdcp_get_repeater_ctl()
280 DRM_ERROR("Unknown transcoder %d\n", cpu_transcoder); in intel_hdcp_get_repeater_ctl()
309 enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder; in intel_hdcp_validate_v_prime() local
337 rep_ctl = intel_hdcp_get_repeater_ctl(dev_priv, cpu_transcoder, port); in intel_hdcp_validate_v_prime()
607 enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder; in intel_hdcp_auth() local
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H A Dintel_audio.c383 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in hsw_dp_audio_config_update() local
396 tmp = I915_READ(HSW_AUD_CFG(cpu_transcoder)); in hsw_dp_audio_config_update()
408 I915_WRITE(HSW_AUD_CFG(cpu_transcoder), tmp); in hsw_dp_audio_config_update()
410 tmp = I915_READ(HSW_AUD_M_CTS_ENABLE(cpu_transcoder)); in hsw_dp_audio_config_update()
421 I915_WRITE(HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp); in hsw_dp_audio_config_update()
430 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in hsw_hdmi_audio_config_update() local
437 tmp = I915_READ(HSW_AUD_CFG(cpu_transcoder)); in hsw_hdmi_audio_config_update()
454 I915_WRITE(HSW_AUD_CFG(cpu_transcoder), tmp); in hsw_hdmi_audio_config_update()
460 tmp = I915_READ(HSW_AUD_M_CTS_ENABLE(cpu_transcoder)); in hsw_hdmi_audio_config_update()
463 I915_WRITE(HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp); in hsw_hdmi_audio_config_update()
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H A Dintel_ddi.c1766 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_ddi_set_dp_msa() local
1772 WARN_ON(transcoder_is_dsi(cpu_transcoder)); in intel_ddi_set_dp_msa()
1818 I915_WRITE(TRANS_MSA_MISC(cpu_transcoder), temp); in intel_ddi_set_dp_msa()
1834 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_ddi_transcoder_func_reg_val_get() local
1867 if (cpu_transcoder == TRANSCODER_EDP) { in intel_ddi_transcoder_func_reg_val_get()
1927 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_ddi_enable_transcoder_func() local
1933 I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp); in intel_ddi_enable_transcoder_func()
1945 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_ddi_config_transcoder_func() local
1950 I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp); in intel_ddi_config_transcoder_func()
1957 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_ddi_disable_transcoder_func() local
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H A Dintel_vdsc.c347 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_dsc_source_support() local
359 (cpu_transcoder == TRANSCODER_EDP || in intel_dsc_source_support()
360 cpu_transcoder == TRANSCODER_DSI_0 || in intel_dsc_source_support()
361 cpu_transcoder == TRANSCODER_DSI_1))) in intel_dsc_source_support()
371 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in is_pipe_dsc() local
376 if (cpu_transcoder == TRANSCODER_EDP || in is_pipe_dsc()
377 cpu_transcoder == TRANSCODER_DSI_0 || in is_pipe_dsc()
378 cpu_transcoder == TRANSCODER_DSI_1) in is_pipe_dsc()
H A Dintel_hdmi.c86 enum transcoder cpu_transcoder) in assert_hdmi_transcoder_func_disabled() argument
88 WARN(I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)) & in assert_hdmi_transcoder_func_disabled()
173 enum transcoder cpu_transcoder, in hsw_dip_data_reg() argument
179 return HSW_TVIDEO_DIP_GMP_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
181 return HSW_TVIDEO_DIP_VSC_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
183 return ICL_VIDEO_DIP_PPS_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
185 return HSW_TVIDEO_DIP_AVI_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
187 return HSW_TVIDEO_DIP_SPD_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
189 return HSW_TVIDEO_DIP_VS_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
191 return GLK_TVIDEO_DIP_DRM_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
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H A Dintel_psr.c169 enum transcoder cpu_transcoder = dev_priv->psr.transcoder; in intel_psr_irq_handler() local
185 transcoder_name(cpu_transcoder)); in intel_psr_irq_handler()
191 transcoder_name(cpu_transcoder)); in intel_psr_irq_handler()
194 u32 val = I915_READ(PSR_EVENT(cpu_transcoder)); in intel_psr_irq_handler()
197 I915_WRITE(PSR_EVENT(cpu_transcoder), val); in intel_psr_irq_handler()
206 transcoder_name(cpu_transcoder)); in intel_psr_irq_handler()
625 if (!transcoder_has_psr2(dev_priv, crtc_state->cpu_transcoder)) { in intel_psr2_config_valid()
627 transcoder_name(crtc_state->cpu_transcoder)); in intel_psr2_config_valid()
766 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_psr_enable_source() local
777 i915_reg_t reg = CHICKEN_TRANS(cpu_transcoder); in intel_psr_enable_source()
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H A Dintel_display.c1096 enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; in intel_wait_for_pipe_off() local
1097 i915_reg_t reg = PIPECONF(cpu_transcoder); in intel_wait_for_pipe_off()
1150 enum transcoder cpu_transcoder = (enum transcoder)pipe; in assert_fdi_tx() local
1151 u32 val = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); in assert_fdi_tx()
1267 enum transcoder cpu_transcoder, bool state) in assert_pipe() argument
1277 power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder); in assert_pipe()
1280 u32 val = I915_READ(PIPECONF(cpu_transcoder)); in assert_pipe()
1290 transcoder_name(cpu_transcoder), in assert_pipe()
1418 assert_pipe_disabled(dev_priv, pipe_config->cpu_transcoder); in vlv_enable_pll()
1467 assert_pipe_disabled(dev_priv, pipe_config->cpu_transcoder); in chv_enable_pll()
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H A Dintel_hdcp.h29 enum transcoder cpu_transcoder, u8 content_type);
H A Dintel_dp_mst.c369 val = I915_READ(TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder)); in intel_mst_post_disable_dp()
371 I915_WRITE(TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder), val); in intel_mst_post_disable_dp()
855 return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder; in intel_dp_mst_is_master_trans()
861 crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder; in intel_dp_mst_is_slave_trans()
H A Dintel_display_types.h400 enum transcoder cpu_transcoder; member
850 enum transcoder cpu_transcoder; member
H A Dintel_panel.c949 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in pch_enable_backlight() local
966 if (cpu_transcoder == TRANSCODER_EDP) in pch_enable_backlight()
969 cpu_ctl2 = BLM_PIPE(cpu_transcoder); in pch_enable_backlight()
H A Dintel_pipe_crc.c322 pipe_config->cpu_transcoder == TRANSCODER_EDP) in intel_crtc_crc_setup_workarounds()
H A Dintel_display.h653 enum transcoder cpu_transcoder, bool state);
H A Dvlv_dsi.c305 pipe_config->cpu_transcoder = TRANSCODER_DSI_C; in intel_dsi_compute_config()
307 pipe_config->cpu_transcoder = TRANSCODER_DSI_A; in intel_dsi_compute_config()
H A Dicl_dsi.c1401 pipe_config->cpu_transcoder = TRANSCODER_DSI_1; in gen11_dsi_compute_config()
1403 pipe_config->cpu_transcoder = TRANSCODER_DSI_0; in gen11_dsi_compute_config()
H A Dintel_dp.c1906 if (IS_GEN(dev_priv, 11) && pipe_config->cpu_transcoder != TRANSCODER_A) in intel_dp_source_supports_fec()
3115 assert_pipe_disabled(dev_priv, pipe_config->cpu_transcoder); in ilk_edp_pll_on()
3155 assert_pipe_disabled(dev_priv, old_crtc_state->cpu_transcoder); in ilk_edp_pll_off()
7050 i915_reg_t reg = PIPECONF(crtc_state->cpu_transcoder); in intel_dp_set_drrs_state()
H A Dintel_tv.c1535 assert_pipe_disabled(dev_priv, pipe_config->cpu_transcoder); in intel_tv_pre_enable()