Searched refs:computeRegisterLiveness (Results 1 – 9 of 9) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86FixupLEAs.cpp | 379 MBB.computeRegisterLiveness(TRI, X86::EFLAGS, I) != in optTwoAddrLEA()
511 MBB.computeRegisterLiveness(TRI, X86::EFLAGS, I, 4) != in processInstructionForSlowLEA()
563 MBB.computeRegisterLiveness(TRI, X86::EFLAGS, I, 4) != in processInstrForSlow3OpLEA()
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| H A D | X86InstrInfo.cpp | 1131 if (ClobbersEFLAGS && MBB.computeRegisterLiveness(&TRI, X86::EFLAGS, I) != in reMaterialize()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 60 if (MBB.computeRegisterLiveness(RegInfo, ARM::CPSR, I) in copyPhysReg()
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| H A D | ARMLoadStoreOptimizer.cpp | 637 (MBB.computeRegisterLiveness(TRI, ARM::CPSR, InsertBefore, 20) == in CreateLoadStoreMulti()
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| H A D | ARMBaseInstrInfo.cpp | 2582 MI->getParent()->computeRegisterLiveness(TRI, CurReg, MI) != in tryFoldSPUpdateIntoPushPop()
5002 MI.getParent()->computeRegisterLiveness(TRI, ImplicitSReg, MI); in getImplicitSPRUseForDPRUse()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | MachineBasicBlock.h | 1035 LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIPeepholeSDWA.cpp | 886 auto Liveness = MBB.computeRegisterLiveness(TRI, AMDGPU::VCC, MI, 25); in pseudoOpConvertToVOP2()
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| H A D | SIFoldOperands.cpp | 259 auto Liveness = MBB->computeRegisterLiveness(&TRI, AMDGPU::VCC, MI, 16); in updateOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachineBasicBlock.cpp | 1511 MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI, in computeRegisterLiveness() function in MachineBasicBlock
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