Home
last modified time | relevance | path

Searched refs:buildBuildVector (Results 1 – 9 of 9) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp420 B.buildBuildVector(OrigRegs[0], Regs); in buildCopyFromRegs()
437 B.buildBuildVector(OrigRegs[0], EltMerges); in buildCopyFromRegs()
442 auto BV = B.buildBuildVector(BVType, Regs); in buildCopyFromRegs()
H A DLegalizerHelper.cpp215 MIRBuilder.buildBuildVector(DstReg, PartRegs); in insertParts()
818 MIRBuilder.buildBuildVector(DstReg, DstRegs); in narrowScalar()
2565 auto NewVec = MIRBuilder.buildBuildVector(MidTy, NewOps); in bitcastExtractVectorElt()
3438 MIRBuilder.buildBuildVector(DstReg, DstRegs); in fewerElementsVectorCasts()
3505 MIRBuilder.buildBuildVector(DstReg, DstRegs); in fewerElementsVectorCmp()
3577 MIRBuilder.buildBuildVector(DstReg, DstRegs); in fewerElementsVectorSelect()
4936 MIRBuilder.buildBuildVector(DstReg, DstRegs); in narrowScalarExtract()
5013 MIRBuilder.buildBuildVector(DstReg, DstRegs); in narrowScalarInsert()
6336 MIRBuilder.buildBuildVector(DstReg, BuildVec); in lowerShuffleVector()
H A DIRTranslator.cpp2913 EntryBuilder->buildBuildVector(Reg, Ops); in translate()
2924 EntryBuilder->buildBuildVector(Reg, Ops); in translate()
2941 EntryBuilder->buildBuildVector(Reg, Ops); in translate()
H A DMachineIRBuilder.cpp634 MachineInstrBuilder MachineIRBuilder::buildBuildVector(const DstOp &Res, in buildBuildVector() function in MachineIRBuilder
H A DCombinerHelper.cpp237 Builder.buildBuildVector(NewDstReg, Ops); in applyCombineConcatVectors()
2848 Builder.buildBuildVector(MI.getOperand(0).getReg(), MatchInfo); in applyCombineInsertVecElts()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp2506 Register PackedVal = B.buildBuildVector(VecTy, { NewVal, CmpVal }).getReg(0); in legalizeAtomicCmpXChg()
3597 return B.buildBuildVector(LLT::vector(NumElts, S32), WideRegs).getReg(0); in handleD16VData()
3606 return B.buildBuildVector(LLT::vector(2, S32), PackedRegs).getReg(0); in handleD16VData()
3615 Reg = B.buildBuildVector(LLT::vector(6, S16), PackedRegs).getReg(0); in handleD16VData()
3626 return B.buildBuildVector(LLT::vector(4, S32), PackedRegs).getReg(0); in handleD16VData()
4049 B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)}) in packImage16bitOpsToDwords()
4053 B.buildBuildVector( in packImage16bitOpsToDwords()
4088 auto VAddr = B.buildBuildVector(LLT::vector(NumAddrRegs, 32), AddrRegs); in convertImageAddrToPacked()
4185 auto Concat = B.buildBuildVector(PackedTy, {VData0, VData1}); in legalizeImageIntrinsic()
4459 B.buildBuildVector(DstReg, ResultRegs); in legalizeImageIntrinsic()
H A DAMDGPURegisterBankInfo.cpp985 auto Merge = B.buildBuildVector(OpTy, ReadlanePieces); in executeInWaterfallLoop()
2055 B.buildBuildVector(MI.getOperand(0), Ops); in foldInsertEltToCmpSelect()
2057 auto Vec = B.buildBuildVector(MergeTy, Ops); in foldInsertEltToCmpSelect()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp423 .buildBuildVector({NewLLT}, {CurVReg, Undef.getReg(0)}) in lowerReturn()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h960 MachineInstrBuilder buildBuildVector(const DstOp &Res,