| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.cpp | 314 .addRegMask(TRI->getCallPreservedMask(MF, Info.CallConv)); in lowerCall()
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| H A D | X86ExpandPseudo.cpp | 252 .addRegMask(RegMask) in expandCALL_RVMARKER()
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| H A D | X86FastISel.cpp | 3504 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in fastLowerCall()
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| H A D | X86ISelLowering.cpp | 32965 .addRegMask(RegMask) in EmitLoweredSegAlloca()
32973 .addRegMask(RegMask) in EmitLoweredSegAlloca()
32982 .addRegMask(RegMask) in EmitLoweredSegAlloca()
33111 MIB.addReg(X86::RAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()
33123 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()
33135 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()
33448 MIB.addRegMask(RegInfo->getNoPreservedMask()); in emitEHSjLjSetJmp()
33895 .addRegMask(RI.getNoPreservedMask()); in EmitSjLjDispatchBlock()
33898 .addRegMask(RI.getNoPreservedMask()); in EmitSjLjDispatchBlock()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 928 MIB.addRegMask(Mask); in lowerTailCall()
1110 MIB.addRegMask(Mask); in lowerCall()
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| H A D | AArch64InstructionSelector.cpp | 3339 .addRegMask(TRI.getTLSCallPreservedMask()); in selectTLSGlobalValue()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstrBuilder.h | 197 const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const { in addRegMask() function
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 489 MIB.addRegMask(TRI->getCallPreservedMask(MF, Info.CallConv)); in lowerCall()
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| H A D | ARMFastISel.cpp | 2276 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in ARMEmitLibcall()
2420 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in SelectCall()
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| H A D | ARMISelLowering.cpp | 10281 MIB.addRegMask(RI.getSjLjDispatchPreservedMask(*MF)); in EmitSjLjDispatchBlock()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZElimCompare.cpp | 687 MIB.addRegMask(RegMask); in fuseCompareOperations()
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| H A D | SystemZInstrInfo.cpp | 750 .addRegMask(RegMask) in PredicateInstruction()
763 .addRegMask(RegMask) in PredicateInstruction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 1137 MIB.addRegMask(Mask); in lowerTailCall()
1311 MIB.addRegMask(Mask); in lowerCall()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 547 MIB.addRegMask(TRI->getCallPreservedMask(MF, F.getCallingConv())); in lowerCall()
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| H A D | MipsFastISel.cpp | 1568 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in fastLowerCall()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 408 MIB.addRegMask(RM->getRegMask()); in AddOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2043 MIB.addRegMask(RegInfo->getNoPreservedMask()); in emitEHSjLjSetJmp()
2267 .addRegMask(RI.getNoPreservedMask()); in emitSjLjDispatchBlock()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 1682 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in fastLowerCall()
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| H A D | PPCISelLowering.cpp | 11470 MIB.addRegMask(TRI->getNoPreservedMask()); in emitEHSjLjSetJmp()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 3249 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in fastLowerCall()
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