Searched refs:ZeroVec (Results 1 – 6 of 6) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstCombineIntrinsic.cpp | 59 Constant *ZeroVec = Constant::getNullValue(II.getType()); in simplifyX86MaskedLoad() local
63 return IC.replaceInstUsesWith(II, ZeroVec); in simplifyX86MaskedLoad()
76 IC.Builder.CreateMaskedLoad(PtrCast, Align(1), BoolMask, ZeroVec); in simplifyX86MaskedLoad()
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| H A D | X86ISelLowering.cpp | 20790 SDValue ZeroVec = DAG.getConstant(0, dl, InVT); in LowerAVXExtend() local
20793 SDValue OpHi = getUnpackh(DAG, dl, InVT, In, NeedZero ? ZeroVec : Undef); in LowerAVXExtend()
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| H A D | CGExprScalar.cpp | 4578 llvm::Value *ZeroVec = llvm::Constant::getNullValue(VecTy); in VisitAbstractConditionalOperator() local
4580 CondV = Builder.CreateICmpNE(CondV, ZeroVec, "vector_cond"); in VisitAbstractConditionalOperator()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 5295 SDValue ZeroVec = in lowerZERO_EXTEND_VECTOR_INREG() local
5307 SDValue Shuf = DAG.getVectorShuffle(InVT, DL, PackedOp, ZeroVec, Mask); in lowerZERO_EXTEND_VECTOR_INREG()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 19197 SDValue ZeroVec = DAG.getConstant(0, DL, VecVT); in reduceBuildVecToShuffleWithZero() local
19200 ZeroVec, ShufMask, DAG); in reduceBuildVecToShuffleWithZero()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9631 SDValue ZeroVec = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerMLOAD() local
9634 VT, dl, N->getChain(), N->getBasePtr(), N->getOffset(), Mask, ZeroVec, in LowerMLOAD()
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