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Searched refs:VTSize (Results 1 – 10 of 10) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.cpp200 unsigned VTSize = 4; in EmitTargetCodeForMemcpy() local
238 DstPtrInfo = DstPtrInfo.getWithOffset(NumRegs * VTSize); in EmitTargetCodeForMemcpy()
239 SrcPtrInfo = SrcPtrInfo.getWithOffset(NumRegs * VTSize); in EmitTargetCodeForMemcpy()
259 VTSize = getRemainingSize(BytesLeft); in EmitTargetCodeForMemcpy()
266 SrcOff += VTSize; in EmitTargetCodeForMemcpy()
267 BytesLeft -= VTSize; in EmitTargetCodeForMemcpy()
276 VTSize = getRemainingSize(BytesLeft); in EmitTargetCodeForMemcpy()
282 DstOff += VTSize; in EmitTargetCodeForMemcpy()
283 BytesLeft -= VTSize; in EmitTargetCodeForMemcpy()
H A DARMCallLowering.cpp75 unsigned VTSize = VT.getSimpleVT().getSizeInBits(); in isSupportedType() local
77 if (VTSize == 64) in isSupportedType()
81 return VTSize == 1 || VTSize == 8 || VTSize == 16 || VTSize == 32; in isSupportedType()
H A DARMISelLowering.cpp7802 uint64_t VTSize = VT.getFixedSizeInBits(); in ReconstructShuffle() local
7803 if (SrcVTSize == VTSize) in ReconstructShuffle()
7809 unsigned NumSrcElts = VTSize / EltVT.getFixedSizeInBits(); in ReconstructShuffle()
7812 if (SrcVTSize < VTSize) { in ReconstructShuffle()
7813 if (2 * SrcVTSize != VTSize) in ReconstructShuffle()
7823 if (SrcVTSize != 2 * VTSize) in ReconstructShuffle()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp917 unsigned VTSize = VT.getScalarSizeInBits(); in earlyExpandDIVFIX() local
926 EVT WideVT = EVT::getIntegerVT(*DAG.getContext(), VTSize * 2); in earlyExpandDIVFIX()
945 assert(SatW <= VTSize && in earlyExpandDIVFIX()
947 Res = SaturateWidenedDIVFIX(Res, dl, SatW == 0 ? VTSize : SatW, Signed, in earlyExpandDIVFIX()
3404 unsigned VTSize = VT.getScalarSizeInBits(); in ExpandIntRes_MULFIX() local
3425 APInt MinVal = APInt::getSignedMinValue(VTSize); in ExpandIntRes_MULFIX()
3426 APInt MaxVal = APInt::getSignedMaxValue(VTSize); in ExpandIntRes_MULFIX()
3436 APInt MaxVal = APInt::getMaxValue(VTSize); in ExpandIntRes_MULFIX()
3447 assert(Scale <= VTSize && "Scale can't be larger than the value type size."); in ExpandIntRes_MULFIX()
3464 assert((VTSize == NVTSize * 2) && "Expected the new value type to be half " in ExpandIntRes_MULFIX()
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H A DTargetLowering.cpp235 unsigned VTSize = VT.getSizeInBits() / 8; in findOptimalMemOpLowering() local
236 while (VTSize > Size) { in findOptimalMemOpLowering()
273 VTSize = Size; in findOptimalMemOpLowering()
276 VTSize = NewVTSize; in findOptimalMemOpLowering()
284 Size -= VTSize; in findOptimalMemOpLowering()
8093 unsigned VTSize = VT.getScalarSizeInBits(); in expandFixedPointMul() local
8107 APInt MinVal = APInt::getSignedMinValue(VTSize); in expandFixedPointMul()
8108 APInt MaxVal = APInt::getSignedMaxValue(VTSize); in expandFixedPointMul()
8120 APInt MaxVal = APInt::getMaxValue(VTSize); in expandFixedPointMul()
8126 assert(((Signed && Scale < VTSize) || (!Signed && Scale <= VTSize)) && in expandFixedPointMul()
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H A DSelectionDAG.cpp6398 unsigned VTSize = VT.getSizeInBits() / 8; in getMemcpyLoadsAndStores() local
6401 if (VTSize > Size) { in getMemcpyLoadsAndStores()
6405 SrcOff -= VTSize - Size; in getMemcpyLoadsAndStores()
6406 DstOff -= VTSize - Size; in getMemcpyLoadsAndStores()
6424 SubSlice.Length = VTSize; in getMemcpyLoadsAndStores()
6446 SrcPtrInfo.getWithOffset(SrcOff).isDereferenceable(VTSize, C, DL); in getMemcpyLoadsAndStores()
6464 SrcOff += VTSize; in getMemcpyLoadsAndStores()
6465 DstOff += VTSize; in getMemcpyLoadsAndStores()
6466 Size -= VTSize; in getMemcpyLoadsAndStores()
6572 unsigned VTSize = VT.getSizeInBits() / 8; in getMemmoveLoadsAndStores() local
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H A DDAGCombiner.cpp16588 TypeSize VTSize = VT.getSizeInBits(); in TransformFPLoadStorePair() local
16592 if (VTSize.isScalable()) in TransformFPLoadStorePair()
16595 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), VTSize.getFixedSize()); in TransformFPLoadStorePair()
19028 uint64_t VTSize = VT.getFixedSizeInBits(); in createBuildVecShuffle() local
19035 if ((VTSize % InVT1Size == 0) && InVT1 == InVT2) { in createBuildVecShuffle()
19038 unsigned NumConcats = VTSize / InVT1Size; in createBuildVecShuffle()
19045 } else if (InVT1Size == VTSize * 2) { in createBuildVecShuffle()
19083 } else if (InVT2Size * 2 == VTSize && InVT1Size == VTSize) { in createBuildVecShuffle()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp3264 uint64_t VTSize = VT.getFixedSizeInBits(); in LowerVectorFP_TO_INT() local
3266 if (VTSize < InVTSize) { in LowerVectorFP_TO_INT()
3274 if (VTSize > InVTSize) { in LowerVectorFP_TO_INT()
3376 uint64_t VTSize = VT.getFixedSizeInBits(); in LowerVectorINT_TO_FP() local
3378 if (VTSize < InVTSize) { in LowerVectorINT_TO_FP()
3386 if (VTSize > InVTSize) { in LowerVectorINT_TO_FP()
7917 uint64_t VTSize = VT.getFixedSizeInBits(); in getRegForInlineAsmConstraint() local
7918 if (VTSize == 16) in getRegForInlineAsmConstraint()
7920 if (VTSize == 32) in getRegForInlineAsmConstraint()
7922 if (VTSize == 64) in getRegForInlineAsmConstraint()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp3428 uint64_t VTSize = DL.getTypeStoreSizeInBits(FixedVectorType::get(EltTy, N)); in canMapToVector() local
3429 if (VTSize < MinVecRegSize || VTSize > MaxVecRegSize || VTSize != DL.getTypeStoreSizeInBits(T)) in canMapToVector()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp19844 unsigned VTSize = VT.getSizeInBits(); in lowerFPToIntToFP() local
19847 MVT VecVT = MVT::getVectorVT(VT, 128 / VTSize); in lowerFPToIntToFP()
19853 IntSize != VTSize ? X86ISD::CVTSI2P : (unsigned)ISD::SINT_TO_FP; in lowerFPToIntToFP()