Searched refs:TypeWidenVector (Results 1 – 15 of 15) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 988 return LegalizeKind(TypeWidenVector, NVT); in getTypeConversion() 1051 return LegalizeKind(TypeWidenVector, LargerVector); in getTypeConversion() 1057 return LegalizeKind(TypeWidenVector, NVT); in getTypeConversion() 1401 case TypeWidenVector: in computeRegisterProperties() 1414 ValueTypeActions.setTypeAction(VT, TypeWidenVector); in computeRegisterProperties() 1426 ValueTypeActions.setTypeAction(VT, TypeWidenVector); in computeRegisterProperties() 1462 ValueTypeActions.setTypeAction(VT, TypeWidenVector); in computeRegisterProperties() 1516 (TA == TypeWidenVector || TA == TypePromoteInteger)) { in getVectorTypeBreakdown()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1178 case TargetLowering::TypeWidenVector: in SplitVecRes_BITCAST() 3507 if (getTypeAction(OtherVT) == TargetLowering::TypeWidenVector) { in WidenVecRes_OverflowOp() 3548 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) { in WidenVecRes_Convert() 3624 if (getTypeAction(SrcVT) == TargetLowering::TypeWidenVector) { in WidenVecRes_FP_TO_XINT_SAT() 3684 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) { in WidenVecRes_EXTEND_VECTOR_INREG() 3812 case TargetLowering::TypeWidenVector: in WidenVecRes_BITCAST() 3889 if (getTypeAction(InVT) != TargetLowering::TypeWidenVector) { in WidenVecRes_CONCAT_VECTORS() 3967 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector) in WidenVecRes_EXTRACT_SUBVECTOR() 4288 if (getTypeAction(VSelVT) == TargetLowering::TypeWidenVector) in WidenVSELECTMask() 4359 if (getTypeAction(CondVT) == TargetLowering::TypeWidenVector) in WidenVecRes_SELECT() [all …]
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| H A D | LegalizeTypes.cpp | 279 case TargetLowering::TypeWidenVector: in run() 342 case TargetLowering::TypeWidenVector: in run()
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| H A D | LegalizeTypesGeneric.cpp | 88 case TargetLowering::TypeWidenVector: { in ExpandRes_BITCAST()
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| H A D | LegalizeIntegerTypes.cpp | 394 case TargetLowering::TypeWidenVector: in PromoteIntRes_BITCAST() 1257 case TargetLowering::TypeWidenVector: { in PromoteIntRes_TRUNCATE()
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| H A D | LegalizeFloatTypes.cpp | 2345 case TargetLowering::TypeWidenVector: { in PromoteFloatRes_EXTRACT_VECTOR_ELT()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 422 return TypeWidenVector; in getPreferredVectorAction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 181 return Action == TargetLoweringBase::TypeWidenVector; in isTypeForHVX()
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| H A D | HexagonISelLoweringHVX.cpp | 253 if (Action == TargetLoweringBase::TypeWidenVector) { in initializeHVXLowering() 303 return TargetLoweringBase::TypeWidenVector; in getPreferredHvxVectorAction() 306 return TargetLoweringBase::TypeWidenVector; in getPreferredHvxVectorAction() 2290 if (Action == TargetLoweringBase::TypeWidenVector) { in shouldWidenToHvx()
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| H A D | HexagonISelLowering.cpp | 2118 return TargetLoweringBase::TypeWidenVector; in getPreferredVectorAction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.h | 747 return TypeWidenVector; in getPreferredVectorAction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 213 TypeWidenVector, // This vector should be widened into a larger vector. enumerator 438 return TypeWidenVector; in getPreferredVectorAction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 2111 return TypeWidenVector; in getPreferredVectorAction() 24265 TargetLowering::TypeWidenVector && "Unexpected type action!"); in LowerStore() 30467 assert(getTypeAction(*DAG.getContext(), VT) == TypeWidenVector && in ReplaceNodeResults() 30492 assert(getTypeAction(*DAG.getContext(), VT) == TypeWidenVector && in ReplaceNodeResults() 30534 assert(getTypeAction(*DAG.getContext(), VT) == TypeWidenVector && in ReplaceNodeResults() 30559 if (getTypeAction(*DAG.getContext(), VT) != TypeWidenVector) in ReplaceNodeResults() 30638 assert(getTypeAction(*DAG.getContext(), InVT) == TypeWidenVector && in ReplaceNodeResults() 30715 assert(getTypeAction(*DAG.getContext(), VT) == TypeWidenVector && in ReplaceNodeResults() 30759 assert(getTypeAction(*DAG.getContext(), VT) == TypeWidenVector && in ReplaceNodeResults() 31194 assert(getTypeAction(*DAG.getContext(), DstVT) == TypeWidenVector && in ReplaceNodeResults() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 1573 return VT.isPow2VectorType() ? TypeSplitVector : TypeWidenVector; in getPreferredVectorAction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 16822 return TypeWidenVector; in getPreferredVectorAction()
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