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Searched refs:SuccEdge (Results 1 – 6 of 6) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DPostRASchedulerList.cpp189 void ReleaseSucc(SUnit *SU, SDep *SuccEdge);
452 void SchedulePostRATDList::ReleaseSucc(SUnit *SU, SDep *SuccEdge) { in ReleaseSucc() argument
453 SUnit *SuccSU = SuccEdge->getSUnit(); in ReleaseSucc()
455 if (SuccEdge->isWeak()) { in ReleaseSucc()
H A DMachineScheduler.cpp637 void ScheduleDAGMI::releaseSucc(SUnit *SU, SDep *SuccEdge) { in releaseSucc() argument
638 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc()
640 if (SuccEdge->isWeak()) { in releaseSucc()
642 if (SuccEdge->isCluster()) in releaseSucc()
656 if (SuccSU->TopReadyCycle < SU->TopReadyCycle + SuccEdge->getLatency()) in releaseSucc()
657 SuccSU->TopReadyCycle = SU->TopReadyCycle + SuccEdge->getLatency(); in releaseSucc()
H A DMachinePipeliner.cpp2791 for (SDep &SuccEdge : SU->Succs) { in checkValidNodeOrder()
2792 SUnit *SuccSU = SuccEdge.getSUnit(); in checkValidNodeOrder()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIMachineScheduler.h196 void undoReleaseSucc(SUnit *SU, SDep *SuccEdge);
197 void releaseSucc(SUnit *SU, SDep *SuccEdge);
H A DSIMachineScheduler.cpp434 void SIScheduleBlock::undoReleaseSucc(SUnit *SU, SDep *SuccEdge) { in undoReleaseSucc() argument
435 SUnit *SuccSU = SuccEdge->getSUnit(); in undoReleaseSucc()
437 if (SuccEdge->isWeak()) { in undoReleaseSucc()
444 void SIScheduleBlock::releaseSucc(SUnit *SU, SDep *SuccEdge) { in releaseSucc() argument
445 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc()
447 if (SuccEdge->isWeak()) { in releaseSucc()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DMachineScheduler.h377 void releaseSucc(SUnit *SU, SDep *SuccEdge);