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Searched refs:SubLo (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonCopyToCombine.cpp592 unsigned SubLo; in combine() local
597 SubLo = Hexagon::isub_lo; in combine()
601 SubLo = Hexagon::vsub_lo; in combine()
606 unsigned DoubleRegDest = TRI->getMatchingSuperReg(LoRegDef, SubLo, SuperRC); in combine()
H A DHexagonBitSimplify.cpp442 unsigned SubLo = HRI.getHexagonSubRegIndex(DstRC, Hexagon::ps_sub_lo); in parseRegSequence() local
444 assert((Sub1 == SubLo && Sub2 == SubHi) || (Sub1 == SubHi && Sub2 == SubLo)); in parseRegSequence()
445 if (Sub1 == SubLo && Sub2 == SubHi) { in parseRegSequence()
450 if (Sub1 == SubHi && Sub2 == SubLo) { in parseRegSequence()
1632 unsigned SubLo = HRI.getHexagonSubRegIndex(*FRC, Hexagon::ps_sub_lo); in processBlock() local
1634 BitTracker::RegisterRef TL = { R, SubLo }; in processBlock()
1642 .addImm(SubLo) in processBlock()
1697 unsigned SubLo = HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_lo); in propagateRegCopy() local
1699 Changed = HBS::replaceSubWithSub(RD.Reg, SubLo, SL.Reg, SL.Sub, MRI); in propagateRegCopy()
1707 unsigned SubLo = HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_lo); in propagateRegCopy() local
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H A DHexagonConstPropagation.cpp1960 unsigned SubLo = HRI.getHexagonSubRegIndex(DefRC, Hexagon::ps_sub_lo); in evaluate() local
1962 if (Sub1 != SubLo && Sub1 != SubHi) in evaluate()
1964 if (Sub2 != SubLo && Sub2 != SubHi) in evaluate()
1967 bool LoIs1 = (Sub1 == SubLo); in evaluate()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp37807 if (SDValue SubLo = FindSubVector128(Imm & 0x0F)) { in combineTargetShuffle() local
37810 SubLo = DAG.getBitcast(SubVT, SubLo); in combineTargetShuffle()
37812 return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, SubLo, SubHi); in combineTargetShuffle()