Home
last modified time | relevance | path

Searched refs:SubHi (Results 1 – 3 of 3) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp443 unsigned SubHi = HRI.getHexagonSubRegIndex(DstRC, Hexagon::ps_sub_hi); in parseRegSequence() local
444 assert((Sub1 == SubLo && Sub2 == SubHi) || (Sub1 == SubHi && Sub2 == SubLo)); in parseRegSequence()
445 if (Sub1 == SubLo && Sub2 == SubHi) { in parseRegSequence()
450 if (Sub1 == SubHi && Sub2 == SubLo) { in parseRegSequence()
1633 unsigned SubHi = HRI.getHexagonSubRegIndex(*FRC, Hexagon::ps_sub_hi); in processBlock() local
1635 BitTracker::RegisterRef TH = { R, SubHi }; in processBlock()
1644 .addImm(SubHi); in processBlock()
1698 unsigned SubHi = HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_hi); in propagateRegCopy() local
1700 Changed |= HBS::replaceSubWithSub(RD.Reg, SubHi, SH.Reg, SH.Sub, MRI); in propagateRegCopy()
1708 unsigned SubHi = HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_hi); in propagateRegCopy() local
[all …]
H A DHexagonConstPropagation.cpp1961 unsigned SubHi = HRI.getHexagonSubRegIndex(DefRC, Hexagon::ps_sub_hi); in evaluate() local
1962 if (Sub1 != SubLo && Sub1 != SubHi) in evaluate()
1964 if (Sub2 != SubLo && Sub2 != SubHi) in evaluate()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp37808 if (SDValue SubHi = FindSubVector128((Imm & 0xF0) >> 4)) { in combineTargetShuffle() local
37811 SubHi = DAG.getBitcast(SubVT, SubHi); in combineTargetShuffle()
37812 return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, SubLo, SubHi); in combineTargetShuffle()