Searched refs:SpillAlignment (Results 1 – 7 of 7) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | InfoByHwMode.cpp | 122 SpillAlignment = R->getValueAsInt("SpillAlignment"); in RegSizeInfo()
126 return std::tie(RegSize, SpillSize, SpillAlignment) < in operator <()
127 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment); in operator <()
132 SpillAlignment && I.SpillAlignment % SpillAlignment == 0 && in isSubClassOf()
138 << ",A=" << SpillAlignment << ']'; in writeToStream()
171 return std::tie(A0.SpillSize, A0.SpillAlignment) > in hasStricterSpillThan()
172 std::tie(B0.SpillSize, B0.SpillAlignment); in hasStricterSpillThan()
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| H A D | InfoByHwMode.h | 151 unsigned SpillAlignment; member
157 return std::tie(RegSize, SpillSize, SpillAlignment) ==
158 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment);
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| H A D | RegisterInfoEmitter.cpp | 1290 << RI.SpillAlignment; in runTargetDesc()
1680 OS << ' ' << getModeName(M) << ':' << RC.RSI.get(M).SpillAlignment; in debugDump()
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| H A D | CodeGenRegisters.cpp | 794 RI.SpillAlignment = R->getValueAsInt("Alignment"); in CodeGenRegisterClass()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 236 unsigned RegSize, SpillSize, SpillAlignment; member
287 return Align(getRegClassInfo(RC).SpillAlignment / 8); in getSpillAlign()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/ |
| H A D | Target.td | 61 int SpillAlignment = SA; // Spill slot alignment in bits.
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| /netbsd-src/external/apache2/llvm/dist/llvm/docs/ |
| H A D | WritingAnLLVMBackend.rst | 355 int SpillAlignment = 0;
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