| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 1585 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN() local 1589 ShiftVT = MagVT; in ExpandFCOPYSIGN() 1592 SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1593 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 1595 SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1596 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 2399 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout()); in ExpandLegalINT_TO_FP() local 2400 SDValue ShiftConst = DAG.getConstant(1, dl, ShiftVT); in ExpandLegalINT_TO_FP()
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| H A D | LegalizeIntegerTypes.cpp | 442 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 445 if (!ShiftVT.isVector() && in getShiftAmountTyForConstant() 446 ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits())) in getShiftAmountTyForConstant() 447 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 448 return ShiftVT; in getShiftAmountTyForConstant() 473 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 475 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 495 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 498 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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| H A D | DAGCombiner.cpp | 3811 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitMUL() local 3812 SDValue Trunc = DAG.getZExtOrTrunc(LogBase2, DL, ShiftVT); in visitMUL() 4323 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitUDIVLike() local 4324 SDValue Trunc = DAG.getZExtOrTrunc(LogBase2, DL, ShiftVT); in visitUDIVLike() 4518 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitMULHU() local 4519 SDValue Trunc = DAG.getZExtOrTrunc(SRLAmt, DL, ShiftVT); in visitMULHU() 5174 EVT ShiftVT = TLI.getShiftAmountTy(HalfVT, DAG.getDataLayout()); in visitANDLike() local 5179 SDValue ShiftK = DAG.getConstant(ShiftBits, SL, ShiftVT); in visitANDLike() 6669 EVT ShiftVT = OppShift.getOperand(1).getValueType(); in extractShiftForRotate() local 6671 SDValue NewShiftNode = DAG.getConstant(NeededShiftAmt, DL, ShiftVT); in extractShiftForRotate() [all …]
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| H A D | TargetLowering.cpp | 1444 EVT ShiftVT = Op1.getValueType(); in SimplifyDemandedBits() local 1467 SDValue NewSA = TLO.DAG.getConstant(Diff, dl, ShiftVT); in SimplifyDemandedBits() 1509 TLO.DAG.getConstant(ShAmt - InnerShAmt, dl, ShiftVT); in SimplifyDemandedBits() 1552 EVT ShiftVT = Op1.getValueType(); in SimplifyDemandedBits() local 1575 SDValue NewSA = TLO.DAG.getConstant(Diff, dl, ShiftVT); in SimplifyDemandedBits() 1604 EVT ShiftVT = Op1.getValueType(); in SimplifyDemandedBits() local 1658 SDValue NewSA = TLO.DAG.getConstant(BitWidth - 1 - Log2, dl, ShiftVT); in SimplifyDemandedBits() 3403 EVT ShiftVT = getShiftAmountTy(OpVT, DAG.getDataLayout(), in foldSetCCWithBinOp() local 3405 SDValue One = DAG.getConstant(1, DL, ShiftVT); in foldSetCCWithBinOp() 6853 EVT ShiftVT = getShiftAmountTy(SrcVT, DAG.getDataLayout()); in expandUINT_TO_FP() local [all …]
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| H A D | SelectionDAG.cpp | 1479 EVT ShiftVT = TLI->getShiftAmountTy(VT, getDataLayout(), LegalTypes); in getShiftAmountConstant() local 1480 return getConstant(Val, DL, ShiftVT); in getShiftAmountConstant()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 5928 EVT ShiftVT = N0.getOperand(1).getValueType(); in combineSIGN_EXTEND() local 5933 ShiftVT)); in combineSIGN_EXTEND() 5935 DAG.getConstant(NewSraAmt, SDLoc(N0), ShiftVT)); in combineSIGN_EXTEND()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 10782 MVT ShiftVT = ResVT; in LowerCONCAT_VECTORSvXi1() local 10784 ShiftVT = Subtarget.hasDQI() ? MVT::v8i1 : MVT::v16i1; in LowerCONCAT_VECTORSvXi1() 10788 SubVec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ShiftVT, in LowerCONCAT_VECTORSvXi1() 10789 DAG.getUNDEF(ShiftVT), SubVec, in LowerCONCAT_VECTORSvXi1() 10791 Op = DAG.getNode(X86ISD::KSHIFTL, dl, ShiftVT, SubVec, in LowerCONCAT_VECTORSvXi1() 12841 static int matchShuffleAsShift(MVT &ShiftVT, unsigned &Opcode, in matchShuffleAsShift() argument 12878 ShiftVT = ByteShift ? MVT::getVectorVT(MVT::i8, SizeInBits / 8) in matchShuffleAsShift() 12911 MVT ShiftVT; in lowerShuffleAsShift() local 12916 int ShiftAmt = matchShuffleAsShift(ShiftVT, Opcode, VT.getScalarSizeInBits(), in lowerShuffleAsShift() 12921 ShiftAmt = matchShuffleAsShift(ShiftVT, Opcode, VT.getScalarSizeInBits(), in lowerShuffleAsShift() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6337 EVT ShiftVT = N->getOperand(1).getValueType(); in LowerShift() local 6339 ISD::SUB, dl, ShiftVT, getZeroVector(ShiftVT, DAG, dl), N->getOperand(1)); in LowerShift()
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