Searched refs:ShiftBits (Results 1 – 6 of 6) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.cpp | 849 unsigned ShiftBits = getEncodingValue(DestReg)*4; in lowerCRRestore() local 852 .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0) in lowerCRRestore() 1011 unsigned ShiftBits = getEncodingValue(DestReg); in lowerCRBitRestore() local 1016 .addImm(ShiftBits ? 32 - ShiftBits : 0) in lowerCRBitRestore() 1017 .addImm(ShiftBits) in lowerCRBitRestore() 1018 .addImm(ShiftBits); in lowerCRBitRestore()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| H A D | BasicAliasAnalysis.cpp | 395 unsigned ShiftBits = Offset.getBitWidth() - PointerSize; in adjustToPointerSize() local 396 return (Offset << ShiftBits).ashr(ShiftBits); in adjustToPointerSize()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 4119 unsigned ShiftBits = AndRHSC.countTrailingZeros(); in SimplifySetCC() local 4120 if (!TLI.shouldAvoidTransformToShift(ShValTy, ShiftBits)) { in SimplifySetCC() 4123 DAG.getConstant(ShiftBits, dl, ShiftTy)); in SimplifySetCC() 4124 SDValue CmpRHS = DAG.getConstant(C1.lshr(ShiftBits), dl, ShValTy); in SimplifySetCC() 4136 unsigned ShiftBits; in SimplifySetCC() local 4140 ShiftBits = C1.countTrailingOnes(); in SimplifySetCC() 4144 ShiftBits = C1.countTrailingZeros(); in SimplifySetCC() 4146 NewC.lshrInPlace(ShiftBits); in SimplifySetCC() 4147 if (ShiftBits && NewC.getMinSignedBits() <= 64 && in SimplifySetCC() 4149 !TLI.shouldAvoidTransformToShift(ShValTy, ShiftBits)) { in SimplifySetCC() [all …]
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| H A D | DAGCombiner.cpp | 5147 unsigned ShiftBits = CShift->getZExtValue(); in visitANDLike() local 5150 if (ShiftBits == 0) in visitANDLike() 5159 (ShiftBits + MaskBits <= Size / 2) && in visitANDLike() 5179 SDValue ShiftK = DAG.getConstant(ShiftBits, SL, ShiftVT); in visitANDLike()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 4571 unsigned ShiftBits = countLeadingZeros(Mask); in getARMCmp() local 4572 if (RHSV && (RHSV > 255 || (RHSV << ShiftBits) <= 255)) { in getARMCmp() 4573 SDValue ShiftAmt = DAG.getConstant(ShiftBits, dl, MVT::i32); in getARMCmp() 4575 RHS = DAG.getConstant(RHSV << ShiftBits, dl, MVT::i32); in getARMCmp()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 6195 SDValue ShiftBits = DAG.getTargetConstant(SubVecNumElems, dl, MVT::i8); in insert1BitVector() local 6198 Vec = DAG.getNode(X86ISD::KSHIFTR, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 6199 Vec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 6247 SDValue ShiftBits = DAG.getTargetConstant(NumElems - IdxVal, dl, MVT::i8); in insert1BitVector() local 6248 Vec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 6249 Vec = DAG.getNode(X86ISD::KSHIFTR, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector()
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