Searched refs:SecondMI (Results 1 – 6 of 6) sorted by relevance
23 const MachineInstr &SecondMI, bool CmpOnly) { in isArithmeticBccPair() argument24 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()71 const MachineInstr &SecondMI) { in isArithmeticCbzPair() argument72 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()73 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()74 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()75 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()121 const MachineInstr &SecondMI) { in isAESPair() argument123 switch (SecondMI.getOpcode()) { in isAESPair()139 const MachineInstr &SecondMI) { in isCryptoEORPair() argument[all …]
68 const MachineInstr &SecondMI, in matchingRegOps() argument71 const MachineOperand &Op2 = SecondMI.getOperand(SecondMIOpIndex); in matchingRegOps()82 const MachineInstr &SecondMI) { in checkOpConstraints() argument90 const MachineOperand &RA = SecondMI.getOperand(1); in checkOpConstraints()99 const MachineOperand &RT = SecondMI.getOperand(0); in checkOpConstraints()107 if (!matchingRegOps(SecondMI, 0, SecondMI, 2) || in checkOpConstraints()122 const MachineOperand &D = SecondMI.getOperand(1); in checkOpConstraints()128 if (SecondMI.getOpcode() == PPC::LD) in checkOpConstraints()147 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument168 if (Feature.hasOp2(SecondMI.getOpcode())) { in shouldScheduleAdjacent()[all …]
23 const MachineInstr &SecondMI) { in isAESPair() argument25 switch(SecondMI.getOpcode()) { in isAESPair()39 const MachineInstr &SecondMI) { in isLiteralsPair() argument42 SecondMI.getOpcode() == ARM::MOVTi16) in isLiteralsPair()54 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument57 if (ST.hasFuseAES() && isAESPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()59 if (ST.hasFuseLiterals() && isLiteralsPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()
29 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument32 switch (SecondMI.getOpcode()) { in shouldScheduleAdjacent()46 const MachineOperand *Src2 = TII.getNamedOperand(SecondMI, in shouldScheduleAdjacent()
37 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument44 const X86::SecondMacroFusionInstKind BranchKind = classifySecond(SecondMI); in shouldScheduleAdjacent()
33 const MachineInstr &SecondMI)>;