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Searched refs:ScratchReg (Results 1 – 23 of 23) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVExpandAtomicPseudoInsts.cpp222 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local
239 BuildMI(LoopMBB, DL, TII->get(RISCV::AND), ScratchReg) in doAtomicBinOpExpansion()
242 BuildMI(LoopMBB, DL, TII->get(RISCV::XORI), ScratchReg) in doAtomicBinOpExpansion()
243 .addReg(ScratchReg) in doAtomicBinOpExpansion()
247 BuildMI(LoopMBB, DL, TII->get(getSCForRMW(Ordering, Width)), ScratchReg) in doAtomicBinOpExpansion()
249 .addReg(ScratchReg); in doAtomicBinOpExpansion()
251 .addReg(ScratchReg) in doAtomicBinOpExpansion()
259 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() argument
260 assert(OldValReg != ScratchReg && "OldValReg and ScratchReg must be unique"); in insertMaskedMerge()
262 assert(ScratchReg != MaskReg && "ScratchReg and MaskReg must be unique"); in insertMaskedMerge()
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H A DRISCVRegisterInfo.cpp237 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local
238 TII->movImm(MBB, II, DL, ScratchReg, Offset.getFixed()); in eliminateFrameIndex()
242 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex()
246 BuildMI(MBB, II, DL, TII->get(RISCV::ADD), ScratchReg) in eliminateFrameIndex()
248 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex()
250 FrameReg = ScratchReg; in eliminateFrameIndex()
262 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local
263 BuildMI(MBB, II, DL, TII->get(RISCV::ADDI), ScratchReg) in eliminateFrameIndex()
267 .ChangeToRegister(ScratchReg, false, false, true); in eliminateFrameIndex()
H A DRISCVFrameLowering.cpp276 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in adjustReg() local
277 TII->movImm(MBB, MBBI, DL, ScratchReg, Val, Flag); in adjustReg()
280 .addReg(ScratchReg, RegState::Kill) in adjustReg()
H A DRISCVInstrInfo.cpp658 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in insertIndirectBranch() local
662 .addReg(ScratchReg, RegState::Define | RegState::Dead) in insertIndirectBranch()
668 MRI.replaceRegWith(ScratchReg, Scav); in insertIndirectBranch()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.cpp653 Register ScratchReg; in emitPrologue() local
689 &MBB, false, twoUniqueScratchRegsRequired(&MBB), &ScratchReg, &TempReg); in emitPrologue()
693 SingleScratchReg = ScratchReg == TempReg; in emitPrologue()
817 BuildMI(MBB, MBBI, dl, MFLRInst, ScratchReg); in emitPrologue()
845 .addReg(ScratchReg, getKillRegState(!HasROPProtect)) in emitPrologue()
863 .addReg(ScratchReg, getKillRegState(true)) in emitPrologue()
905 .addDef(ScratchReg) in emitPrologue()
912 BuildMI(MBB, MBBI, dl, TII.get(PPC::SUBF), ScratchReg) in emitPrologue()
921 BuildMI(MBB, MBBI, dl, TII.get(PPC::RLDICL), ScratchReg) in emitPrologue()
926 BuildMI(MBB, MBBI, dl, TII.get(PPC::RLWINM), ScratchReg) in emitPrologue()
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H A DPPCAsmPrinter.cpp445 Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); in LowerPATCHPOINT() local
449 .addReg(ScratchReg) in LowerPATCHPOINT()
453 .addReg(ScratchReg) in LowerPATCHPOINT()
454 .addReg(ScratchReg) in LowerPATCHPOINT()
458 .addReg(ScratchReg) in LowerPATCHPOINT()
459 .addReg(ScratchReg) in LowerPATCHPOINT()
463 .addReg(ScratchReg) in LowerPATCHPOINT()
464 .addReg(ScratchReg) in LowerPATCHPOINT()
484 .addReg(ScratchReg)); in LowerPATCHPOINT()
487 .addReg(ScratchReg) in LowerPATCHPOINT()
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H A DPPCISelLowering.cpp11726 Register ScratchReg = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca() local
11732 ScratchReg) in emitProbedAlloca()
11736 BuildMI(*MBB, {MI}, DL, TII->get(isPPC64 ? PPC::LI8 : PPC::LI), ScratchReg) in emitProbedAlloca()
11744 .addReg(ScratchReg); in emitProbedAlloca()
11748 .addReg(ScratchReg); in emitProbedAlloca()
11779 .addReg(ScratchReg); in emitProbedAlloca()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFInstrInfo.cpp50 Register ScratchReg = MI->getOperand(4).getReg(); in expandMEMCPY() local
79 .addReg(ScratchReg, RegState::Define).addReg(SrcReg) in expandMEMCPY()
82 .addReg(ScratchReg, RegState::Kill).addReg(DstReg) in expandMEMCPY()
93 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY()
95 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
100 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY()
102 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
107 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY()
109 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
H A DBPFISelLowering.cpp691 unsigned ScratchReg; in EmitInstrWithCustomInserterMemcpy() local
708 ScratchReg = MRI.createVirtualRegister(&BPF::GPRRegClass); in EmitInstrWithCustomInserterMemcpy()
709 MIB.addReg(ScratchReg, in EmitInstrWithCustomInserterMemcpy()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64FalkorHWPFFix.cpp751 for (unsigned ScratchReg : AArch64::GPR64RegClass) { in runOnLoop() local
752 if (!LR.available(ScratchReg) || MRI.isReserved(ScratchReg)) in runOnLoop()
756 NewLdI.BaseReg = ScratchReg; in runOnLoop()
763 << printReg(ScratchReg, TRI) << '\n'); in runOnLoop()
771 BuildMI(*MBB, &MI, DL, TII->get(AArch64::ORRXrs), ScratchReg) in runOnLoop()
776 BaseOpnd.setReg(ScratchReg); in runOnLoop()
782 << printReg(ScratchReg, TRI) << '\n'); in runOnLoop()
784 ScratchReg); // Change tied operand pre/post update dest. in runOnLoop()
788 .addReg(ScratchReg) in runOnLoop()
H A DAArch64RegisterInfo.cpp694 Register ScratchReg = in eliminateFrameIndex() local
696 emitFrameOffset(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, Offset, in eliminateFrameIndex()
698 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(AArch64::LDG), ScratchReg) in eliminateFrameIndex()
699 .addReg(ScratchReg) in eliminateFrameIndex()
700 .addReg(ScratchReg) in eliminateFrameIndex()
703 .ChangeToRegister(ScratchReg, false, false, true); in eliminateFrameIndex()
724 Register ScratchReg = createScratchRegisterForInstruction(MI, TII); in eliminateFrameIndex() local
725 emitFrameOffset(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, Offset, TII); in eliminateFrameIndex()
726 MI.getOperand(FIOperandNum).ChangeToRegister(ScratchReg, false, false, true); in eliminateFrameIndex()
H A DAArch64AsmPrinter.cpp887 Register ScratchReg = MI.getOperand(1).getReg(); in LowerJumpTableDest() local
889 STI->getRegisterInfo()->getSubReg(ScratchReg, AArch64::sub_32); in LowerJumpTableDest()
924 .addReg(Size == 4 ? ScratchReg : ScratchRegW) in LowerJumpTableDest()
935 .addReg(ScratchReg) in LowerJumpTableDest()
985 Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); in LowerPATCHPOINT() local
989 .addReg(ScratchReg) in LowerPATCHPOINT()
993 .addReg(ScratchReg) in LowerPATCHPOINT()
994 .addReg(ScratchReg) in LowerPATCHPOINT()
998 .addReg(ScratchReg) in LowerPATCHPOINT()
999 .addReg(ScratchReg) in LowerPATCHPOINT()
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H A DAArch64FrameLowering.cpp3171 Register ScratchReg = MRI->createVirtualRegister(&AArch64::GPR64RegClass); in emitUnrolled() local
3172 emitFrameOffset(*MBB, InsertI, DL, ScratchReg, BaseReg, in emitUnrolled()
3174 BaseReg = ScratchReg; in emitUnrolled()
H A DAArch64FastISel.cpp4990 const unsigned ScratchReg = createResultReg(&AArch64::GPR32RegClass); in selectAtomicCmpXchg() local
4995 .addDef(ScratchReg) in selectAtomicCmpXchg()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp341 Register ScratchReg = in eliminateFrameIndex() local
349 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset); in eliminateFrameIndex()
351 MI->getOperand(FIOperandNum + 2).ChangeToRegister(ScratchReg, in eliminateFrameIndex()
357 BuildMI(MBB, MI, DL, TII->get(LAOpcode),ScratchReg) in eliminateFrameIndex()
362 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset); in eliminateFrameIndex()
363 BuildMI(MBB, MI, DL, TII->get(SystemZ::LA), ScratchReg) in eliminateFrameIndex()
364 .addReg(BasePtr, RegState::Kill).addImm(0).addReg(ScratchReg); in eliminateFrameIndex()
368 MI->getOperand(FIOperandNum).ChangeToRegister(ScratchReg, in eliminateFrameIndex()
H A DSystemZAsmPrinter.cpp659 unsigned ScratchReg = 0; in LowerPATCHPOINT() local
662 ScratchReg = MI.getOperand(ScratchIdx).getReg(); in LowerPATCHPOINT()
663 } while (ScratchReg == SystemZ::R0D); in LowerPATCHPOINT()
667 .addReg(ScratchReg) in LowerPATCHPOINT()
672 .addReg(ScratchReg) in LowerPATCHPOINT()
679 .addReg(ScratchReg)); in LowerPATCHPOINT()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.cpp825 unsigned ScratchReg = 0; in eliminateFrameIndex() local
840 ScratchReg = MF.getRegInfo().createVirtualRegister(RegClass); in eliminateFrameIndex()
842 emitARMRegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, in eliminateFrameIndex()
846 emitT2RegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, in eliminateFrameIndex()
850 MI.getOperand(FIOperandNum).ChangeToRegister(ScratchReg, false, false,true); in eliminateFrameIndex()
H A DThumb1FrameLowering.cpp71 unsigned ScratchReg, unsigned MIFlags) { in emitPrologueEpilogueSPUpdate() argument
79 if (ScratchReg == ARM::NoRegister) in emitPrologueEpilogueSPUpdate()
84 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi32imm), ScratchReg) in emitPrologueEpilogueSPUpdate()
87 MRI.emitLoadConstPool(MBB, MBBI, dl, ScratchReg, 0, NumBytes, ARMCC::AL, in emitPrologueEpilogueSPUpdate()
92 .addReg(ScratchReg, RegState::Kill) in emitPrologueEpilogueSPUpdate()
H A DARMAsmPrinter.cpp2022 Register ScratchReg = MI->getOperand(1).getReg(); in emitInstruction() local
2032 .addReg(ScratchReg) in emitInstruction()
2069 .addReg(ScratchReg) in emitInstruction()
2082 Register ScratchReg = MI->getOperand(1).getReg(); in emitInstruction() local
2085 .addReg(ScratchReg) in emitInstruction()
2096 .addReg(ScratchReg) in emitInstruction()
2102 .addReg(ScratchReg) in emitInstruction()
2138 .addReg(ScratchReg) in emitInstruction()
H A DARMExpandPseudoInsts.cpp2084 unsigned ScratchReg = ClearRegs.front(); in ExpandMI() local
2097 BuildMI(MBB, MBBI, DL, TII->get(ARM::tMOVi8), ScratchReg) in ExpandMI()
2104 .addReg(ScratchReg) in ExpandMI()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86FrameLowering.cpp2742 unsigned ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true); in adjustForSegmentedStacks() local
2743 assert(!MF.getRegInfo().isLiveIn(ScratchReg) && in adjustForSegmentedStacks()
2819 ScratchReg = IsLP64 ? X86::RSP : X86::ESP; in adjustForSegmentedStacks()
2821 … BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r), ScratchReg).addReg(X86::RSP) in adjustForSegmentedStacks()
2824 BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::CMP64rm : X86::CMP32rm)).addReg(ScratchReg) in adjustForSegmentedStacks()
2846 ScratchReg = X86::ESP; in adjustForSegmentedStacks()
2848 BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP) in adjustForSegmentedStacks()
2853 BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg) in adjustForSegmentedStacks()
2884 .addReg(ScratchReg) in adjustForSegmentedStacks()
3111 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; in adjustForHiPEPrologue() local
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H A DX86MCInstLower.cpp1429 Register ScratchReg = MI.getOperand(ScratchIdx).getReg(); in LowerPATCHPOINT() local
1430 if (X86II::isX86_64ExtendedReg(ScratchReg)) in LowerPATCHPOINT()
1436 MCInstBuilder(X86::MOV64ri).addReg(ScratchReg).addOperand(CalleeMCOp)); in LowerPATCHPOINT()
1441 EmitAndCountInstruction(MCInstBuilder(X86::CALL64r).addReg(ScratchReg)); in LowerPATCHPOINT()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp3284 Register ScratchReg = MRI.createVirtualRegister(&AArch64::GPR64spRegClass); in selectBrJT() local
3288 {TargetReg, ScratchReg}, {JTAddr, Index}) in selectBrJT()