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/netbsd-src/crypto/external/bsd/openssl/dist/crypto/bn/asm/
H A Dppc.pl118 $ST= "stw"; # store
142 $ST= "std"; # store
302 $ST r9,`0*$BNSZ`(r3) # r[0]=c1;
317 $ST r10,`1*$BNSZ`(r3) #r[1]=c2;
336 $ST r11,`2*$BNSZ`(r3) #r[2]=c3
360 $ST r9,`3*$BNSZ`(r3) #r[3]=c1
378 $ST r10,`4*$BNSZ`(r3) #r[4]=c2
390 $ST r11,`5*$BNSZ`(r3) #r[5] = c3
397 $ST r9,`6*$BNSZ`(r3) #r[6]=c1
398 $ST r10,`7*$BNSZ`(r3) #r[7]=c2
[all …]
H A Dppc-mont.pl58 $ST= "stw"; # store
67 $PUSH= $ST;
79 $ST= "std"; # store
88 $PUSH= $ST;
214 $ST $lo1,0($tp) ; tp[j-1]
227 $ST $lo1,0($tp) ; tp[j-1]
232 $ST $hi1,$BNSZ($tp)
278 $ST $lo1,0($tp) ; tp[j-1]
292 $ST $lo1,0($tp) ; tp[j-1]
298 $ST $hi1,$BNSZ($tp)
[all …]
H A Dmips.pl64 $ST="sd";
79 $ST="sw";
188 $ST $t1,0($a0)
201 $ST $t3,$BNSZ($a0)
215 $ST $ta1,-2*$BNSZ($a0)
227 $ST $ta3,-$BNSZ($a0)
248 $ST $t1,0($a0)
263 $ST $t1,$BNSZ($a0)
277 $ST $t1,2*$BNSZ($a0)
340 $ST $v0,0($a0)
[all …]
/netbsd-src/crypto/external/bsd/openssl.old/dist/crypto/bn/asm/
H A Dppc.pl115 $ST= "stw"; # store
139 $ST= "std"; # store
298 $ST r9,`0*$BNSZ`(r3) # r[0]=c1;
313 $ST r10,`1*$BNSZ`(r3) #r[1]=c2;
332 $ST r11,`2*$BNSZ`(r3) #r[2]=c3
356 $ST r9,`3*$BNSZ`(r3) #r[3]=c1
374 $ST r10,`4*$BNSZ`(r3) #r[4]=c2
386 $ST r11,`5*$BNSZ`(r3) #r[5] = c3
393 $ST r9,`6*$BNSZ`(r3) #r[6]=c1
394 $ST r10,`7*$BNSZ`(r3) #r[7]=c2
[all …]
H A Dppc-mont.pl55 $ST= "stw"; # store
64 $PUSH= $ST;
76 $ST= "std"; # store
85 $PUSH= $ST;
210 $ST $lo1,0($tp) ; tp[j-1]
223 $ST $lo1,0($tp) ; tp[j-1]
228 $ST $hi1,$BNSZ($tp)
274 $ST $lo1,0($tp) ; tp[j-1]
288 $ST $lo1,0($tp) ; tp[j-1]
294 $ST $hi1,$BNSZ($tp)
[all …]
H A Dmips.pl64 $ST="sd";
79 $ST="sw";
186 $ST $t1,0($a0)
199 $ST $t3,$BNSZ($a0)
213 $ST $ta1,-2*$BNSZ($a0)
225 $ST $ta3,-$BNSZ($a0)
246 $ST $t1,0($a0)
261 $ST $t1,$BNSZ($a0)
275 $ST $t1,2*$BNSZ($a0)
338 $ST $v0,0($a0)
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp66 MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) { in MipsLegalizerInfo() argument
79 .legalIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
82 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
103 .legalIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
106 {s32, p0, 16, ST.systemSupportsUnalignedAccess()}, in MipsLegalizerInfo()
109 {s64, p0, 64, ST.systemSupportsUnalignedAccess()}})) in MipsLegalizerInfo()
111 if (ST.hasMSA() && CheckTy0Ty1MemSizeAlign( in MipsLegalizerInfo()
122 .customIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
137 if (!ST.systemSupportsUnalignedAccess() && in MipsLegalizerInfo()
194 .legalIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVTargetTransformInfo.h33 const RISCVSubtarget *ST; variable
36 const RISCVSubtarget *getST() const { return ST; } in getST()
41 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), in RISCVTTIImpl()
42 TLI(ST->getTargetLowering()) {} in RISCVTTIImpl()
57 bool supportsScalableVectors() const { return ST->hasStdExtV(); } in supportsScalableVectors()
63 return TypeSize::getFixed(ST->getXLen()); in getRegisterBitWidth()
66 ST->hasStdExtV() ? ST->getMinRVVVectorSizeInBits() : 0); in getRegisterBitWidth()
69 ST->hasStdExtV() ? ST->getMinRVVVectorSizeInBits() : 0); in getRegisterBitWidth()
90 return ST->hasStdExtZfh(); in isLegalElementTypeForRVV()
92 return ST->hasStdExtF(); in isLegalElementTypeForRVV()
[all …]
/netbsd-src/sys/stand/efiboot/
H A Dconsole.c44 status = uefi_call_wrapper(ST->ConIn->ReadKeyStroke, 2, ST->ConIn, &key); in getchar()
46 if (ST->ConIn->WaitForKey != NULL) in getchar()
47 WaitForSingleEvent(ST->ConIn->WaitForKey, 0); in getchar()
48 status = uefi_call_wrapper(ST->ConIn->ReadKeyStroke, 2, ST->ConIn, &key); in getchar()
61 uefi_call_wrapper(ST->ConOut->OutputString, 2, ST->ConOut, buf); in putchar()
70 if (ST->ConIn->WaitForKey == NULL) { in ischar()
73 status = uefi_call_wrapper(ST->ConIn->ReadKeyStroke, 2, ST->ConIn, &key); in ischar()
80 status = uefi_call_wrapper(BS->CheckEvent, 1, ST->ConIn->WaitForKey); in ischar()
/netbsd-src/external/bsd/file/dist/magic/magdir/
H A Duf229 >>28 lelong 0x00ff6919 ST STM32L4xx
30 >>28 lelong 0x04240bdf ST STM32L5xx
35 >>28 lelong 0x1e1f432d ST STM32L1xx
36 >>28 lelong 0x202e3a91 ST STM32L0xx
37 >>28 lelong 0x21460ff0 ST STM32WLxx
39 >>28 lelong 0x300f5633 ST STM32G0xx
41 >>28 lelong 0x4c71240a ST STM32G4xx
43 >>28 lelong 0x53b80f00 ST STM32F7xx
45 >>28 lelong 0x57755a57 ST STM32F401
47 >>28 lelong 0x5d1a0a2e ST STM32F2xx
[all …]
/netbsd-src/crypto/external/bsd/netpgp/dist/bindings/perl/
H A Dnetpgpperl_wrap.c1794 res1 = SWIG_ConvertPtr(ST(0), &argp1,SWIGTYPE_p_netpgp_t, 0 | 0 ); in XS()
1799 ecode2 = SWIG_AsVal_unsigned_SS_int SWIG_PERL_CALL_ARGS_2(ST(1), &val2); in XS()
1830 res1 = SWIG_ConvertPtr(ST(0), &argp1,SWIGTYPE_p_netpgp_t, 0 | 0 ); in XS()
1836 ST(argvi) = SWIG_From_unsigned_SS_int SWIG_PERL_CALL_ARGS_1((unsigned int)(result)); argvi++ ; in XS()
1860 res1 = SWIG_ConvertPtr(ST(0), &argp1,SWIGTYPE_p_netpgp_t, 0 | 0 ); in XS()
1865 ecode2 = SWIG_AsVal_unsigned_SS_int SWIG_PERL_CALL_ARGS_2(ST(1), &val2); in XS()
1896 res1 = SWIG_ConvertPtr(ST(0), &argp1,SWIGTYPE_p_netpgp_t, 0 | 0 ); in XS()
1902 ST(argvi) = SWIG_From_unsigned_SS_int SWIG_PERL_CALL_ARGS_1((unsigned int)(result)); argvi++ ; in XS()
1926 res1 = SWIG_ConvertPtr(ST(0), &argp1,SWIGTYPE_p_netpgp_t, 0 | 0 ); in XS()
1931 res2 = SWIG_ConvertPtr(ST(1), &argp2,SWIGTYPE_p_p_char, 0 | 0 ); in XS()
[all …]
/netbsd-src/external/gpl3/gcc/dist/libphobos/libdruntime/config/powerpc/
H A Dswitchcontext.S179 # define ST std macro
186 # define ST stw macro
213 ST r31, ( -1 * SZ)(r1)
214 ST r30, ( -2 * SZ)(r1)
215 ST r29, ( -3 * SZ)(r1)
216 ST r28, ( -4 * SZ)(r1)
217 ST r27, ( -5 * SZ)(r1)
218 ST r26, ( -6 * SZ)(r1)
219 ST r25, ( -7 * SZ)(r1)
220 ST r24, ( -8 * SZ)(r1)
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/TableGen/
H A DSetTheory.cpp40 void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, in apply()
42 ST.evaluate(Expr->arg_begin(), Expr->arg_end(), Elts, Loc); in apply()
48 void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, in apply()
54 ST.evaluate(*Expr->arg_begin(), Add, Loc); in apply()
55 ST.evaluate(Expr->arg_begin() + 1, Expr->arg_end(), Sub, Loc); in apply()
64 void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, in apply()
70 ST.evaluate(Expr->arg_begin()[0], S1, Loc); in apply()
71 ST.evaluate(Expr->arg_begin()[1], S2, Loc); in apply()
80 virtual void apply2(SetTheory &ST, DagInit *Expr, RecSet &Set, int64_t N,
83 void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, in apply()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp61 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in getVGPRSpillLaneOrTempRegister() local
62 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in getVGPRSpillLaneOrTempRegister()
118 static void buildPrologSpill(const GCNSubtarget &ST, const SIRegisterInfo &TRI, in buildPrologSpill() argument
124 unsigned Opc = ST.enableFlatScratch() ? AMDGPU::SCRATCH_STORE_DWORD_SADDR in buildPrologSpill()
139 static void buildEpilogRestore(const GCNSubtarget &ST, in buildEpilogRestore() argument
146 unsigned Opc = ST.enableFlatScratch() ? AMDGPU::SCRATCH_LOAD_DWORD_SADDR in buildEpilogRestore()
188 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEntryFunctionFlatScratchInit() local
189 const SIInstrInfo *TII = ST.getInstrInfo(); in emitEntryFunctionFlatScratchInit()
206 if (ST.isAmdPalOS()) { in emitEntryFunctionFlatScratchInit()
272 if (ST.flatScratchIsPointer()) { in emitEntryFunctionFlatScratchInit()
[all …]
H A DGCNIterativeScheduler.cpp94 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in printRegions() local
100 R->MaxPressure.print(OS, &ST); in printRegions()
118 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in printSchedRP() local
120 Before.print(OS, &ST); in printSchedRP()
122 After.print(OS, &ST); in printSchedRP()
404 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleRegion() local
409 SchedMaxRP.print(dbgs(), &ST), in scheduleRegion()
411 MaxRP.print(dbgs(), &ST), in scheduleRegion()
413 RegionMaxRP.print(dbgs(), &ST), in scheduleRegion()
419 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in sortRegionsByPressure() local
[all …]
H A DSIMachineFunctionInfo.cpp38 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in SIMachineFunctionInfo() local
40 FlatWorkGroupSizes = ST.getFlatWorkGroupSizes(F); in SIMachineFunctionInfo()
41 WavesPerEU = ST.getWavesPerEU(F); in SIMachineFunctionInfo()
43 Occupancy = ST.computeOccupancy(F, getLDSSize()); in SIMachineFunctionInfo()
73 if (!ST.enableFlatScratch()) { in SIMachineFunctionInfo()
87 MaxKernArgAlign = std::max(ST.getAlignmentForImplicitArgPtr(), in SIMachineFunctionInfo()
127 if (!ST.flatScratchIsArchitected()) { in SIMachineFunctionInfo()
131 if (ST.getGeneration() >= AMDGPUSubtarget::GFX9 && in SIMachineFunctionInfo()
138 bool isAmdHsaOrMesa = ST.isAmdHsaOrMesa(F); in SIMachineFunctionInfo()
140 if (!ST.enableFlatScratch()) in SIMachineFunctionInfo()
[all …]
H A DGCNHazardRecognizer.cpp30 ST(MF.getSubtarget<GCNSubtarget>()), in GCNHazardRecognizer()
31 TII(*ST.getInstrInfo()), in GCNHazardRecognizer()
36 TSchedModel.init(&ST); in GCNHazardRecognizer()
97 static bool isXDL(const GCNSubtarget &ST, const MachineInstr &MI) { in isXDL() argument
160 if (ST.hasNSAtoVMEMBug() && checkNSAtoVMEMHazard(MI) > 0) in getHazardType()
166 if (ST.hasNoDataDepHazard()) in getHazardType()
201 if (ST.hasReadM0MovRelInterpHazard() && in getHazardType()
206 if (ST.hasReadM0SendMsgHazard() && isSendMsgTraceDataOrGDS(TII, *MI) && in getHazardType()
278 if (ST.hasNSAtoVMEMBug()) in PreEmitNoopsCommon()
283 if (ST.hasNoDataDepHazard()) in PreEmitNoopsCommon()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp106 if (ST->hasMVEIntegerOps()) in getPreferredAddressingMode()
112 if (ST->isMClass() && ST->isThumb2() && in getPreferredAddressingMode()
261 if (!ST->isThumb()) { in getIntImmCost()
266 return ST->hasV6T2Ops() ? 2 : 3; in getIntImmCost()
268 if (ST->isThumb2()) { in getIntImmCost()
273 return ST->hasV6T2Ops() ? 2 : 3; in getIntImmCost()
357 if (ST->isThumb2() && NegImm < 1<<12) in getIntImmCostInst()
360 if (ST->isThumb() && NegImm < 1<<8) in getIntImmCostInst()
371 if (Inst && ((ST->hasV6Ops() && !ST->isThumb()) || ST->isThumb2()) && in getIntImmCostInst()
386 (ST->hasNEON() || ST->hasMVEIntegerOps())) { in getCFInstrCost()
[all …]
H A DARMTargetTransformInfo.h62 const ARMSubtarget *ST; variable
98 const ARMSubtarget *getST() const { return ST; } in getST()
103 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), in ARMTTIImpl()
104 TLI(ST->getTargetLowering()) {} in ARMTTIImpl()
118 return !ST->isTargetDarwin() && !ST->hasMVEFloatOps(); in isFPVectorizationPotentiallyUnsafe()
147 if (ST->hasNEON()) in getNumberOfRegisters()
149 if (ST->hasMVEIntegerOps()) in getNumberOfRegisters()
154 if (ST->isThumb1Only()) in getNumberOfRegisters()
164 if (ST->hasNEON()) in getRegisterBitWidth()
166 if (ST->hasMVEIntegerOps()) in getRegisterBitWidth()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
H A DARCTargetTransformInfo.h33 const ARCSubtarget *ST; variable
36 const ARCSubtarget *getST() const { return ST; } in getST()
41 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl()), in ARCTTIImpl()
42 TLI(ST->getTargetLowering()) {} in ARCTTIImpl()
46 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {} in ARCTTIImpl()
48 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)), in ARCTTIImpl()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.h47 const AArch64Subtarget *ST; variable
50 const AArch64Subtarget *getST() const { return ST; } in getST()
64 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), in AArch64TTIImpl()
65 TLI(ST->getTargetLowering()) {} in AArch64TTIImpl()
96 if (ST->hasNEON()) in getNumberOfRegisters()
114 if (ST->hasSVE()) in getRegisterBitWidth()
116 std::max(ST->getMinSVEVectorSizeInBits(), 128u)); in getRegisterBitWidth()
117 return TypeSize::getFixed(ST->hasNEON() ? 128 : 0); in getRegisterBitWidth()
119 return TypeSize::getScalable(ST->hasSVE() ? 128 : 0); in getRegisterBitWidth()
125 return ST->getMinVectorRegisterBitWidth(); in getMinVectorRegisterBitWidth()
[all …]
/netbsd-src/sys/arch/i386/stand/efiboot/
H A Deficons.c260 status = uefi_call_wrapper(ST->ConIn->ReadKeyStroke, 2, ST->ConIn, in efi_cons_getc()
263 WaitForSingleEvent(ST->ConIn->WaitForKey, 0); in efi_cons_getc()
264 status = uefi_call_wrapper(ST->ConIn->ReadKeyStroke, 2, in efi_cons_getc()
265 ST->ConIn, &key); in efi_cons_getc()
292 status = uefi_call_wrapper(ST->ConIn->ReadKeyStroke, 2, ST->ConIn, in efi_cons_iskey()
307 status = WaitForSingleEvent(ST->ConIn->WaitForKey, timeout); in efi_cons_waitforinputevent()
386 uefi_call_wrapper(ST->ConOut->ClearScreen, 1, ST->ConOut); in clear_pc_screen()
527 curmode = ST->ConOut->Mode->Mode; in print_text_modes()
528 for (i = 0; i < ST->ConOut->Mode->MaxMode; i++) { in print_text_modes()
529 status = uefi_call_wrapper(ST->ConOut->QueryMode, 4, in print_text_modes()
[all …]
/netbsd-src/crypto/external/bsd/openssl.old/dist/crypto/rc4/asm/
H A Drc4-parisc.pl71 $ST="stb";
76 $ST="stw";
107 $ST $TX[0],0($ix)
111 $ST $TY,0($iy)
127 $ST $TX[0],0($iy)
129 $ST $TY,0($ix)
239 $ST $XX[0],`-2*$SZ`($key)
240 $ST $YY,`-1*$SZ`($key)
259 $ST %r0,`0*$SZ`($key)
260 $ST %r0,`1*$SZ`($key)
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/
H A DMCSectionXCOFF.h43 XCOFF::SymbolType ST, SectionKind K, MCSymbolXCOFF *QualName, in MCSectionXCOFF() argument
47 CsectProp(XCOFF::CsectProperties(SMC, ST)), QualName(QualName), in MCSectionXCOFF()
51 (ST == XCOFF::XTY_SD || ST == XCOFF::XTY_CM || ST == XCOFF::XTY_ER) && in MCSectionXCOFF()
55 assert((ST == XCOFF::XTY_CM || ST == XCOFF::XTY_ER) && in MCSectionXCOFF()
61 if (ST != XCOFF::XTY_ER) in MCSectionXCOFF()
/netbsd-src/crypto/external/bsd/openssl/dist/crypto/rc4/asm/
H A Drc4-parisc.pl74 $ST="stb";
79 $ST="stw";
110 $ST $TX[0],0($ix)
114 $ST $TY,0($iy)
130 $ST $TX[0],0($iy)
132 $ST $TY,0($ix)
242 $ST $XX[0],`-2*$SZ`($key)
243 $ST $YY,`-1*$SZ`($key)
262 $ST %r0,`0*$SZ`($key)
263 $ST %r0,`1*$SZ`($key)
[all …]

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