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Searched refs:SReg (Results 1 – 25 of 38) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DRegisterScavenging.cpp546 Register SReg = findSurvivorReg(I, Candidates, 25, UseMI); in scavengeRegister() local
549 if (!isRegUsed(SReg)) { in scavengeRegister()
550 LLVM_DEBUG(dbgs() << "Scavenged register: " << printReg(SReg, TRI) << "\n"); in scavengeRegister()
551 return SReg; in scavengeRegister()
557 ScavengedInfo &Scavenged = spill(SReg, *RC, SPAdj, I, UseMI); in scavengeRegister()
561 << printReg(SReg, TRI) << "\n"); in scavengeRegister()
563 return SReg; in scavengeRegister()
654 Register SReg = RS.scavengeRegisterBackwards(RC, DefMI.getIterator(), in scavengeVReg() local
656 MRI.replaceRegWith(VReg, SReg); in scavengeVReg()
658 return SReg; in scavengeVReg()
[all …]
H A DLivePhysRegs.cpp263 for (MCSuperRegIterator SReg(Reg, &TRI); SReg.isValid(); ++SReg) { in addLiveIns() local
264 if (LiveRegs.contains(*SReg) && !MRI.isReserved(*SReg)) { in addLiveIns()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp100 unsigned getDPRLaneFromSPR(unsigned SReg);
115 unsigned getPrefSPRLane(unsigned SReg);
144 unsigned A15SDOptimizer::getDPRLaneFromSPR(unsigned SReg) { in getDPRLaneFromSPR() argument
145 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, in getDPRLaneFromSPR()
153 unsigned A15SDOptimizer::getPrefSPRLane(unsigned SReg) { in getPrefSPRLane() argument
154 if (!Register::isVirtualRegister(SReg)) in getPrefSPRLane()
155 return getDPRLaneFromSPR(SReg); in getPrefSPRLane()
157 MachineInstr *MI = MRI->getVRegDef(SReg); in getPrefSPRLane()
159 MachineOperand *MO = MI->findRegisterDefOperand(SReg); in getPrefSPRLane()
165 SReg = MI->getOperand(1).getReg(); in getPrefSPRLane()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DVirtRegMap.h154 void setIsSplitFromReg(Register virtReg, Register SReg) { in setIsSplitFromReg() argument
155 Virt2SplitMap[virtReg.id()] = SReg; in setIsSplitFromReg()
156 if (hasShape(SReg)) { in setIsSplitFromReg()
157 Virt2ShapeMap[virtReg.id()] = getShape(SReg); in setIsSplitFromReg()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIPreEmitPeephole.cpp119 Register SReg; in optimizeVccBranch() local
121 SReg = Op2.getReg(); in optimizeVccBranch()
125 if (M->definesRegister(SReg, TRI)) in optimizeVccBranch()
127 if (M->modifiesRegister(SReg, TRI)) in optimizeVccBranch()
129 ReadsSreg |= M->readsRegister(SReg, TRI); in optimizeVccBranch()
168 if (SReg == ExecReg) { in optimizeVccBranch()
H A DSIShrinkInstructions.cpp761 Register SReg = Src2->getReg(); in runOnMachineFunction() local
762 if (SReg.isVirtual()) { in runOnMachineFunction()
763 MRI.setRegAllocationHint(SReg, 0, VCCReg); in runOnMachineFunction()
766 if (SReg != VCCReg) in runOnMachineFunction()
H A DSIInstrInfo.cpp1057 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local
1058 BuildMI(MBB, I, DL, get(AMDGPU::COPY), SReg) in insertVectorSelect()
1065 .addReg(SReg); in insertVectorSelect()
1070 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local
1072 : AMDGPU::S_CSELECT_B64), SReg) in insertVectorSelect()
1080 .addReg(SReg); in insertVectorSelect()
1084 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local
1086 : AMDGPU::S_CSELECT_B64), SReg) in insertVectorSelect()
1094 .addReg(SReg); in insertVectorSelect()
1100 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local
[all …]
H A DSIRegisterInfo.td1004 defm SSrc : RegImmOperand<"SReg", "SSrc">;
1016 defm SCSrc : RegInlineOperand<"SReg", "SCSrc"> ;
/netbsd-src/external/apache2/llvm/dist/clang/include/clang/StaticAnalyzer/Core/PathSensitive/
H A DMemRegion.h992 ParamVarRegion(const Expr *OE, unsigned Idx, const MemRegion *SReg) in ParamVarRegion() argument
993 : VarRegion(SReg, ParamVarRegionKind), OriginExpr(OE), Index(Idx) { in ParamVarRegion()
994 assert(!cast<StackSpaceRegion>(SReg)->getStackFrame()->inTopFrame()); in ParamVarRegion()
998 unsigned Idx, const MemRegion *SReg);
1217 const SubRegion *SReg) in CXXBaseObjectRegion() argument
1218 : TypedValueRegion(SReg, CXXBaseObjectRegionKind), Data(RD, IsVirtual) { in CXXBaseObjectRegion()
1223 bool IsVirtual, const MemRegion *SReg);
1254 CXXDerivedObjectRegion(const CXXRecordDecl *DerivedD, const SubRegion *SReg) in CXXDerivedObjectRegion() argument
1255 : TypedValueRegion(SReg, CXXDerivedObjectRegionKind), DerivedD(DerivedD) { in CXXDerivedObjectRegion()
1260 assert(SReg->getSymbolicBase() && in CXXDerivedObjectRegion()
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/netbsd-src/external/gpl3/binutils.old/dist/opcodes/
H A Di386-reg.tbl106 es, Class=SReg, 0, 0, 40, 50
107 cs, Class=SReg, 0, 1, 41, 51
108 ss, Class=SReg, 0, 2, 42, 52
109 ds, Class=SReg, 0, 3, 43, 53
110 fs, Class=SReg, 0, 4, 44, 54
111 gs, Class=SReg, 0, 5, 45, 55
112 flat, Class=SReg, 0, RegFlat, Dw2Inval, Dw2Inval
H A DChangeLog-2019584 (operand_classes): Add SReg entry.
585 (operand_types): Drop SReg entry.
586 * i386-opc.h (enum operand_class): Add SReg.
587 (SReg): Delete.
589 * i386-opc.tbl (SReg): Define.
590 * i386-reg.tbl: Replace SReg by Class=SReg.
951 with SReg operand.
1107 * i386-gen.c (operand_type_init, operand_types): Replace SReg
1110 (SReg): ... this.
1112 * i386-opc.tbl (mov, ): Use SReg.
[all …]
H A Di386-opc.h782 SReg, /* Segment register */ enumerator
H A Di386-gen.c748 CLASS (SReg),
/netbsd-src/external/gpl3/binutils/dist/opcodes/
H A Di386-reg.tbl173 es, Class=SReg, 0, 0, 40, 50
174 cs, Class=SReg, 0, 1, 41, 51
175 ss, Class=SReg, 0, 2, 42, 52
176 ds, Class=SReg, 0, 3, 43, 53
177 fs, Class=SReg, 0, 4, 44, 54
178 gs, Class=SReg, 0, 5, 45, 55
179 flat, Class=SReg, 0, RegFlat, Dw2Inval, Dw2Inval
H A DChangeLog-2019584 (operand_classes): Add SReg entry.
585 (operand_types): Drop SReg entry.
586 * i386-opc.h (enum operand_class): Add SReg.
587 (SReg): Delete.
589 * i386-opc.tbl (SReg): Define.
590 * i386-reg.tbl: Replace SReg by Class=SReg.
951 with SReg operand.
1107 * i386-gen.c (operand_type_init, operand_types): Replace SReg
1110 (SReg): ... this.
1112 * i386-opc.tbl (mov, ): Use SReg.
[all …]
H A Di386-opc.h812 SReg, /* Segment register */ enumerator
H A Di386-gen.c503 CLASS (SReg),
/netbsd-src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Core/
H A DMemRegion.cpp307 unsigned Idx, const MemRegion *SReg) { in ProfileRegion() argument
311 ID.AddPointer(SReg); in ProfileRegion()
395 const MemRegion *SReg) { in ProfileRegion() argument
398 ID.AddPointer(SReg); in ProfileRegion()
407 const MemRegion *SReg) { in ProfileRegion() argument
409 ID.AddPointer(SReg); in ProfileRegion()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp4861 unsigned SReg = Inst.getOperand(1).getReg(); in expandRotation() local
4869 if (DReg == SReg) { in expandRotation()
4877 TOut.emitRRR(Mips::ROTRV, DReg, SReg, TmpReg, Inst.getLoc(), STI); in expandRotation()
4882 TOut.emitRRR(Mips::ROTRV, DReg, SReg, TReg, Inst.getLoc(), STI); in expandRotation()
4908 TOut.emitRRR(FirstShift, ATReg, SReg, ATReg, Inst.getLoc(), STI); in expandRotation()
4909 TOut.emitRRR(SecondShift, DReg, SReg, TReg, Inst.getLoc(), STI); in expandRotation()
4924 unsigned SReg = Inst.getOperand(1).getReg(); in expandRotationImm() local
4936 TOut.emitRRI(Mips::ROTR, DReg, SReg, ShiftValue, Inst.getLoc(), STI); in expandRotationImm()
4941 TOut.emitRRI(Mips::ROTR, DReg, SReg, ImmValue, Inst.getLoc(), STI); in expandRotationImm()
4950 TOut.emitRRI(Mips::SRL, DReg, SReg, 0, Inst.getLoc(), STI); in expandRotationImm()
[all …]
/netbsd-src/external/gpl3/gdb.old/dist/opcodes/
H A DChangeLog-2019584 (operand_classes): Add SReg entry.
585 (operand_types): Drop SReg entry.
586 * i386-opc.h (enum operand_class): Add SReg.
587 (SReg): Delete.
589 * i386-opc.tbl (SReg): Define.
590 * i386-reg.tbl: Replace SReg by Class=SReg.
951 with SReg operand.
1107 * i386-gen.c (operand_type_init, operand_types): Replace SReg
1110 (SReg): ... this.
1112 * i386-opc.tbl (mov, ): Use SReg.
[all …]
/netbsd-src/external/gpl3/gdb/dist/opcodes/
H A DChangeLog-2019584 (operand_classes): Add SReg entry.
585 (operand_types): Drop SReg entry.
586 * i386-opc.h (enum operand_class): Add SReg.
587 (SReg): Delete.
589 * i386-opc.tbl (SReg): Define.
590 * i386-reg.tbl: Replace SReg by Class=SReg.
951 with SReg operand.
1107 * i386-gen.c (operand_type_init, operand_types): Replace SReg
1110 (SReg): ... this.
1112 * i386-opc.tbl (mov, ): Use SReg.
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp1325 SReg = MF.getRegInfo().createVirtualRegister(RC); in eliminateFrameIndex() local
1329 BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::LI8 : PPC::LI), SReg) in eliminateFrameIndex()
1334 BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::ORI8 : PPC::ORI), SReg) in eliminateFrameIndex()
1360 MI.getOperand(OperandBase + 1).ChangeToRegister(SReg, false, false, true); in eliminateFrameIndex()
/netbsd-src/external/gpl3/binutils.old/dist/gas/config/
H A Dtc-i386-intel.c323 if (i386_regtab[reg_num].reg_type.bitfield.class == SReg in i386_intel_simplify_register()
1063 if (i386_regtab[expP->X_add_number].reg_type.bitfield.class != SReg) in i386_intel_operand()
H A Dtc-i386.c2999 case SReg: in md_begin()
3140 || x->types[j].bitfield.class == SReg in pi()
7952 else if (i.types[0].bitfield.class == SReg) in process_operands()
8576 || i.types[op].bitfield.class == SReg in build_modrm_byte()
11456 if (*op_string == ':' && r->reg_type.bitfield.class == SReg) in i386_att_operand()
12816 || (r->reg_type.bitfield.class == SReg && r->reg_num > 3) in check_register()
12879 if (r->reg_type.bitfield.class == SReg && r->reg_num == RegFlat in check_register()
/netbsd-src/external/gpl3/binutils/dist/gas/config/
H A Dtc-i386-intel.c328 if ((i386_regtab[reg_num].reg_type.bitfield.class == SReg in i386_intel_simplify_register()
1159 if (i386_regtab[expP->X_add_number].reg_type.bitfield.class != SReg) in i386_intel_operand()

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