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Searched refs:SRAV (Results 1 – 15 of 15) sorted by relevance

/netbsd-src/sys/arch/mips/mips/
H A Dbds_emul.S271 PTR_WORD bcemul_special_genshiftv # 007 SRAV
374 jr ra; srav t0, v0, v1 # 007 SRAV
/netbsd-src/sys/external/bsd/sljit/dist/sljit_src/
H A DsljitNativeMIPS_32.c409 EMIT_SHIFT(SRA, SRAV); in emit_single_op()
H A DsljitNativeMIPS_64.c503 EMIT_SHIFT(DSRA, DSRA32, SRA, DSRAV, SRAV); in emit_single_op()
H A DsljitNativeMIPS_common.c167 #define SRAV (HI(0) | LO(7)) macro
/netbsd-src/external/gpl3/gdb/dist/sim/mips/
H A Dm16.igen847 11101,3.RX,3.RY,00111:RR:16::SRAV
H A DChangeLog-20211859 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
2526 (SRAV): Use new function do_srav.
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsScheduleP5600.td226 ADDu, SLLV, SRAV, SRLV, LSA, COPY)>;
H A DMipsInstrInfo.td2088 def SRAV : MMRel, shift_rotate_reg<"srav", GPR32Opnd, II_SRAV, sra>,
2882 (SRAV GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
2888 (SRAV GPR32Opnd:$rd, GPR32Opnd:$rd, GPR32Opnd:$rt), 0>;
H A DMipsFastISel.cpp2022 Opcode = Mips::SRAV; in selectShift()
H A DMipsScheduleGeneric.td50 SLLV, SLT, SLTi, SLTiu, SLTu, SRA, SRAV, SRL,
H A DMips64InstrInfo.td943 (SRAV GPR32:$src, GPR32:$src2), sub_32)>;
H A DMips16InstrInfo.td1234 // Format: SRAV ry, rx MIPS16e
/netbsd-src/external/gpl3/binutils.old/dist/cpu/
H A Diq2000.cpu263 …(("SLL" 0) ("SLMV" 1) ("SRL" 2) ("SRA" 3) ("SLLV" 4) ("SRMV" 5) ("SRLV" 6) ("SRAV" 7…
/netbsd-src/external/gpl3/gdb.old/dist/cpu/
H A Diq2000.cpu263 …(("SLL" 0) ("SLMV" 1) ("SRL" 2) ("SRA" 3) ("SLLV" 4) ("SRMV" 5) ("SRLV" 6) ("SRAV" 7…
/netbsd-src/external/gpl3/binutils/dist/cpu/
H A Diq2000.cpu263 …(("SLL" 0) ("SLMV" 1) ("SRL" 2) ("SRA" 3) ("SLLV" 4) ("SRMV" 5) ("SRLV" 6) ("SRAV" 7…