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/netbsd-src/sys/arch/sh3/sh3/
H A Ddevreg.c103 SH ## x ## REG(TRA); \
104 SH ## x ## REG(EXPEVT); \
105 SH ## x ## REG(INTEVT); \
107 SH ## x ## REG(BARA); \
108 SH ## x ## REG(BAMRA); \
109 SH ## x ## REG(BASRA); \
110 SH ## x ## REG(BBRA); \
111 SH ## x ## REG(BARB); \
112 SH ## x ## REG(BAMRB); \
113 SH ## x ## REG(BASRB); \
[all …]
/netbsd-src/external/gpl3/binutils.old/dist/opcodes/
H A Dmips16-opc.c198 #define SH INSN2_SHORT_ONLY macro
213 {"nop", "", 0x6500, 0xffff, 0, SH|RD_16|AL, I1, 0, 0 }, /* move $0,$Z */
221 {"addiu", "x,S,V", 0x0000, 0xf800, WR_1, SH|RD_SP, 0, E2, 0 },
225 {"addu", "z,v,y", 0xe001, 0xf803, WR_1|RD_2|RD_3, SH, I1, 0, 0 },
231 {"addu", "x,S,V", 0x0000, 0xf800, WR_1, SH|RD_SP, 0, E2, 0 },
235 {"and", "x,y", 0xe80c, 0xf81f, MOD_1|RD_2, SH, I1, 0, 0 },
260 {"break", "", 0xe805, 0xffff, TRAP, SH, I1, 0, 0 },
261 {"break", "6", 0xe805, 0xf81f, TRAP, SH, I1, 0, 0 },
266 {"cmp", "x,y", 0xe80a, 0xf81f, RD_1|RD_2|WR_T, SH, I1, 0, 0 },
275 {"daddu", "z,v,y", 0xe000, 0xf803, WR_1|RD_2|RD_3, SH, I3, 0, 0 },
[all …]
/netbsd-src/external/gpl3/binutils/dist/opcodes/
H A Dmips16-opc.c198 #define SH INSN2_SHORT_ONLY macro
213 {"nop", "", 0x6500, 0xffff, 0, SH|RD_16|AL, I1, 0, 0 }, /* move $0,$Z */
221 {"addiu", "x,S,V", 0x0000, 0xf800, WR_1, SH|RD_SP, 0, E2, 0 },
225 {"addu", "z,v,y", 0xe001, 0xf803, WR_1|RD_2|RD_3, SH, I1, 0, 0 },
231 {"addu", "x,S,V", 0x0000, 0xf800, WR_1, SH|RD_SP, 0, E2, 0 },
235 {"and", "x,y", 0xe80c, 0xf81f, MOD_1|RD_2, SH, I1, 0, 0 },
260 {"break", "", 0xe805, 0xffff, TRAP, SH, I1, 0, 0 },
261 {"break", "6", 0xe805, 0xf81f, TRAP, SH, I1, 0, 0 },
266 {"cmp", "x,y", 0xe80a, 0xf81f, RD_1|RD_2|WR_T, SH, I1, 0, 0 },
275 {"daddu", "z,v,y", 0xe000, 0xf803, WR_1|RD_2|RD_3, SH, I3, 0, 0 },
[all …]
/netbsd-src/external/gpl3/binutils/dist/gas/doc/
H A Dc-sh.texi5 @node SH-Dependent
6 @chapter Renesas / SuperH SH Dependent Features
8 @cindex SH support
10 * SH Options:: Options
11 * SH Syntax:: Syntax
12 * SH Floating Point:: Floating Point
13 * SH Directives:: SH Machine Directives
14 * SH Opcodes:: Opcodes
17 @node SH Options
20 @cindex SH options
[all …]
H A Dh8.texi15 @set SH
25 @set TARGET H8/300, H8/500, and Renesas SH
/netbsd-src/external/gpl3/binutils.old/dist/gas/doc/
H A Dc-sh.texi5 @node SH-Dependent
6 @chapter Renesas / SuperH SH Dependent Features
8 @cindex SH support
10 * SH Options:: Options
11 * SH Syntax:: Syntax
12 * SH Floating Point:: Floating Point
13 * SH Directives:: SH Machine Directives
14 * SH Opcodes:: Opcodes
17 @node SH Options
20 @cindex SH options
[all …]
H A Dh8.texi15 @set SH
25 @set TARGET H8/300, H8/500, and Renesas SH
/netbsd-src/sys/arch/amiga/dev/
H A Drtmons5 SW 640 SH 200 MW 640 MH 200
11 SW 640 SH 400 MW 640 MH 400
17 SW 600 SH 480 MW 600 MH 480
23 SW 800 SH 600 MW 800 MH 600
29 SW 800 SH 600 MW 800 MH 600
35 SW 1024 SH 768 MW 1024 MH 768
41 SW 800 SH 600 MW 800 MH 600
47 SW 1280 SH 1024 MW 1280 MH 1024
53 SW 1440 SH 1280 MW 1440 MH 1280
59 SW 800 SH 600 MW 800 MH 600
[all …]
/netbsd-src/sys/arch/hpc/stand/hpcboot/sh3/
H A Dsh_arch.h81 class SH ## x : public SHArchitecture { \
85 SH ## x(Console *&cons, MemoryManager *&mem, boot_func_t bootfunc)\
90 ~SH ## x(void) { \
107 SH ## x ## _CACHE_FLUSH(); \
176 SH##x##::boot_func(struct BootArgs *bi, struct PageTag *p) \
185 SH ## x ## _MMU_DISABLE(); \
198 SH ## x ## _CACHE_FLUSH(); \
/netbsd-src/external/ibm-public/postfix/dist/proto/
H A Dpostconf.man.epilog1 .SH SEE ALSO
6 .SH LICENSE
10 .SH AUTHOR(S)
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCInstPrinter.cpp115 unsigned char SH = MI->getOperand(2).getImm(); in printInst() local
119 if (SH <= 31 && MB == 0 && ME == (31-SH)) { in printInst()
122 if (SH <= 31 && MB == (32-SH) && ME == 31) { in printInst()
124 SH = 32-SH; in printInst()
130 O << ", " << (unsigned int)SH; in printInst()
139 unsigned char SH = MI->getOperand(2).getImm(); in printInst() local
142 if (63-SH == ME) { in printInst()
147 O << ", " << (unsigned int)SH; in printInst()
/netbsd-src/sys/arch/hpc/stand/dspgen/
H A Dgen_template.sh252 if [ -f asm_build.SH.0 ]; then
253 sed 's/%%% ASM %%%/asmsh.exe/' asm_build.SH.0 > asm_build.SH
254 rm -f asm_build.SH.0
H A DMakefile6 TYPE=application sh gen_template.sh vc5 SH MIPS
7 TYPE=static_library sh gen_template.sh vc5 SH MIPS
/netbsd-src/external/bsd/top/dist/machine/
H A Dm_freebsd.man1 .SH "FreeBSD NOTES"
22 .SH "FreeBSD THREADS"
32 .SH "FreeBSD ALTERNATE DISPLAY"
62 .SH "FreeBSD KERNEL SUMMARY"
91 .SH "FreeBSD MEMORY SUMMARY"
/netbsd-src/usr.sbin/paxctl/
H A Dpaxctl.c189 #define SH(field) (size == 32 ? SWAP(s.h32.field) : SWAP(s.h64.field)) in process_one() macro
241 if (SH(sh_type) != SHT_NOTE) in process_one()
244 if (pread(fd, &n, NHSIZE, (off_t)SH(sh_offset)) != NHSIZE) { in process_one()
252 if (pread(fd, &pax_tag, sizeof(pax_tag), SH(sh_offset) + NHSIZE) in process_one()
297 (off_t)SH(sh_offset) + NHSIZE) != sizeof(pax_tag)) in process_one()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/Utils/
H A DScalarEvolutionExpander.h270 Value *expandCodeFor(const SCEV *SH, Type *Ty, Instruction *I) {
271 return expandCodeForImpl(SH, Ty, I, true);
278 Value *expandCodeFor(const SCEV *SH, Type *Ty = nullptr) {
279 return expandCodeForImpl(SH, Ty, true);
396 Value *expandCodeForImpl(const SCEV *SH, Type *Ty, bool Root);
402 Value *expandCodeForImpl(const SCEV *SH, Type *Ty, Instruction *I, bool Root);
/netbsd-src/external/gpl3/binutils/dist/cpu/
H A Dsh.cpu1 ; Hitachi SH architecture description. -*- Scheme -*-
30 (comment "Hitachi SuperH (SH)")
56 (comment "SH 64-bit family")
64 (comment "SH-2 CPU core")
71 (comment "SH-3 CPU core")
78 (comment "SH-3e CPU core")
85 (comment "SH-4 CPU core")
92 (comment "SH-5 CPU core")
99 (comment "SH-5 reference implementation")
/netbsd-src/external/gpl3/gdb.old/dist/cpu/
H A Dsh.cpu1 ; Hitachi SH architecture description. -*- Scheme -*-
30 (comment "Hitachi SuperH (SH)")
56 (comment "SH 64-bit family")
64 (comment "SH-2 CPU core")
71 (comment "SH-3 CPU core")
78 (comment "SH-3e CPU core")
85 (comment "SH-4 CPU core")
92 (comment "SH-5 CPU core")
99 (comment "SH-5 reference implementation")
/netbsd-src/external/gpl3/binutils.old/dist/cpu/
H A Dsh.cpu1 ; Hitachi SH architecture description. -*- Scheme -*-
30 (comment "Hitachi SuperH (SH)")
56 (comment "SH 64-bit family")
64 (comment "SH-2 CPU core")
71 (comment "SH-3 CPU core")
78 (comment "SH-3e CPU core")
85 (comment "SH-4 CPU core")
92 (comment "SH-5 CPU core")
99 (comment "SH-5 reference implementation")
/netbsd-src/external/gpl3/gdb/dist/cpu/
H A Dsh.cpu1 ; Hitachi SH architecture description. -*- Scheme -*-
30 (comment "Hitachi SuperH (SH)")
56 (comment "SH 64-bit family")
64 (comment "SH-2 CPU core")
71 (comment "SH-3 CPU core")
78 (comment "SH-3e CPU core")
85 (comment "SH-4 CPU core")
92 (comment "SH-5 CPU core")
99 (comment "SH-5 reference implementation")
/netbsd-src/external/bsd/file/dist/magic/magdir/
H A Dcoff27 # Hitachi SH big-endian COFF (./hitachi-sh)
28 >>>>0 uleshort 0x0500 Hitachi SH big-endian
29 # Hitachi SH little-endian COFF (./hitachi-sh)
30 >>>>0 uleshort 0x0550 Hitachi SH little-endian
/netbsd-src/external/bsd/ntp/dist/scripts/deprecated/
H A Dhtml2man.in130 print MANOUT "\n\n.SH $text\n";
142 print MANOUT "\n.SH AUTHOR\n$text\n";
230 print MANOUT "\n.SH SEE ALSO\n\n";
/netbsd-src/sys/arch/hpcsh/hpcsh/
H A Dkloader_machdep.c108 SH ## cpu ## _TLB_DISABLE; \
118 SH ## product ## _CACHE_FLUSH(); \
/netbsd-src/games/quiz/datfiles/
H A Ded19 print next "SH" and following line:\
20 /SH/;[{.}+{1}|.1]p|/SH/,[//|/SH/][{.}+{1}|.1]p
/netbsd-src/external/cddl/dtracetoolkit/dist/Examples/
H A Dsh_stat_example.txt10 TIME EXEC/s FUNCS/s BLTINS/s SUB-SH/s CMD/s
29 TIME EXEC/s FUNCS/s BLTINS/s SUB-SH/s CMD/s

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