Home
last modified time | relevance | path

Searched refs:SDWA (Results 1 – 19 of 19) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DVOPInstructions.td393 def SDWA {
431 // GFX9 adds two features to SDWA:
432 // 1. Add 3 fields to the SDWA microcode word: S0, S1 and OMOD.
436 // 2. Add a new version of the SDWA microcode word for VOPC: SDWAB. This
442 // In GFX9, V_MAC_F16, V_MAC_F32 opcodes cannot be used with SDWA
444 // gfx9 SDWA basic encoding
464 // gfx9 SDWA-A
477 // gfx9 SDWA-B
504 let SDWA = 1;
513 let AsmVariantName = !if(P.HasExtSDWA, AMDGPUAsmVariants.SDWA,
[all …]
H A DSIPeepholeSDWA.cpp112 using namespace AMDGPU::SDWA;
367 DstUnused->getImm() == AMDGPU::SDWA::DstUnused::UNUSED_PRESERVE) { in convertToSDWA()
374 if (DstSel == AMDGPU::SDWA::SdwaSel::WORD_1 && in convertToSDWA()
375 getSrcSel() == AMDGPU::SDWA::SdwaSel::WORD_0) { in convertToSDWA()
439 getDstSel() != AMDGPU::SDWA::DWORD) { in convertToSDWA()
1077 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD); in convertToSDWA()
1087 SDWAInst.addImm(AMDGPU::SDWA::DstUnused::UNUSED_PAD); in convertToSDWA()
1097 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD); in convertToSDWA()
1107 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD); in convertToSDWA()
1114 DstUnused->getImm() == AMDGPU::SDWA::DstUnused::UNUSED_PRESERVE) { in convertToSDWA()
H A DAMDGPU.td380 "Support SDWA (Sub-DWORD Addressing) extension"
386 "Support OMod with SDWA (Sub-DWORD Addressing) extension"
392 "Support scalar register with SDWA (Sub-DWORD Addressing) extension"
398 "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension"
404 "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension"
410 "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension"
1117 string SDWA = "SDWA";
1139 let Name = AMDGPUAsmVariants.SDWA;
H A DSIDefines.h41 SDWA = 1 << 14, enumerator
248 SDWA = 2, enumerator
637 namespace SDWA {
H A DSIInstrFormats.td34 field bit SDWA = 0;
161 let TSFlags{14} = SDWA;
223 let hasExtraSrcRegAllocReq = !or(VOP1, VOP2, VOP3, VOPC, SDWA, VALU);
H A DSIInstrInfo.td25 int SDWA = 2;
1446 // instructions with SDWA extension
1583 // Return type of input modifiers operand specified input operand for SDWA
1766 // Ins for SDWA
1814 (outs), // no dst for VOPC, we use "vcc"-token as dst in SDWA VOPC instructions
1819 // Outs for SDWA
2009 0, // NumSrcArgs == 3 - No SDWA for VOP3
2011 0, // 64-bit dst - No SDWA for 64-bit operands
2036 // Function that checks if instruction supports DPP and SDWA
2109 // HasSrc*FloatMods affects the SDWA encoding. We ignore EnableF32SrcMods.
[all …]
H A DAMDGPUInstructionSelector.cpp1888 .addImm(AMDGPU::SDWA::WORD_1) // $dst_sel in selectG_TRUNC()
1889 .addImm(AMDGPU::SDWA::UNUSED_PRESERVE) // $dst_unused in selectG_TRUNC()
1890 .addImm(AMDGPU::SDWA::WORD_0) // $src0_sel in selectG_TRUNC()
2870 .addImm(AMDGPU::SDWA::WORD_1) // $dst_sel in selectG_SHUFFLE_VECTOR()
2871 .addImm(AMDGPU::SDWA::UNUSED_PRESERVE) // $dst_unused in selectG_SHUFFLE_VECTOR()
2872 .addImm(AMDGPU::SDWA::WORD_0) // $src0_sel in selectG_SHUFFLE_VECTOR()
2888 .addImm(AMDGPU::SDWA::WORD_0) // $dst_sel in selectG_SHUFFLE_VECTOR()
2889 .addImm(AMDGPU::SDWA::UNUSED_PRESERVE) // $dst_unused in selectG_SHUFFLE_VECTOR()
2890 .addImm(AMDGPU::SDWA::WORD_1) // $src0_sel in selectG_SHUFFLE_VECTOR()
H A DSIInstrInfo.h436 return MI.getDesc().TSFlags & SIInstrFlags::SDWA; in isSDWA()
440 return get(Opcode).TSFlags & SIInstrFlags::SDWA; in isSDWA()
H A DSIInstrInfo.cpp850 .addImm(DstLow ? AMDGPU::SDWA::SdwaSel::WORD_0 in copyPhysReg()
851 : AMDGPU::SDWA::SdwaSel::WORD_1) in copyPhysReg()
852 .addImm(AMDGPU::SDWA::DstUnused::UNUSED_PRESERVE) in copyPhysReg()
853 .addImm(SrcLow ? AMDGPU::SDWA::SdwaSel::WORD_0 in copyPhysReg()
854 : AMDGPU::SDWA::SdwaSel::WORD_1) in copyPhysReg()
3906 DstUnused->getImm() == AMDGPU::SDWA::UNUSED_PRESERVE) { in verifyInstruction()
7477 SDWA = 2, enumerator
7535 if (get(Opcode).TSFlags & SIInstrFlags::SDWA) { in pseudoToMCOpcode()
7538 Gen = SIEncodingFamily::SDWA; in pseudoToMCOpcode()
H A DVOP1Instructions.td109 // We only want to set this on the basic, non-SDWA or DPP forms.
H A DVOP3Instructions.td920 // (they do not support SDWA or DPP).
/netbsd-src/external/apache2/llvm/dist/llvm/docs/
H A DAMDGPUInstructionSyntax.rst126 they may also be encoded in *VOP3*, *DPP* and *SDWA* formats.
137 *SDWA* encoding _sdwa
H A DAMDGPUInstructionNotation.rst72 :ref:`SDWA operand modifiers<amdgpu_synid_sdwa_operand_modifiers>`.
H A DAMDGPUModifierSyntax.rst1289 SDWA Modifiers
1382 SDWA Operand Modifiers
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DSIMCCodeEmitter.cpp405 using namespace AMDGPU::SDWA; in getSDWASrcEncoding()
435 using namespace AMDGPU::SDWA; in getSDWAVopcDstEncoding()
H A DAMDGPUInstPrinter.cpp376 } else if (Flags & SIInstrFlags::SDWA) { in printVOPDst()
937 using namespace llvm::AMDGPU::SDWA; in printSDWASel()
976 using namespace llvm::AMDGPU::SDWA; in printSDWADstUnused()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp3059 (isForcedSDWA() && !(TSFlags & SIInstrFlags::SDWA)) ) in checkTargetMatchPredicate()
3073 if (!Op.isImm() || Op.getImm() != AMDGPU::SDWA::SdwaSel::DWORD) { in checkTargetMatchPredicate()
3084 AMDGPUAsmVariants::SDWA, AMDGPUAsmVariants::SDWA9, AMDGPUAsmVariants::DPP in getAllVariants()
3103 static const unsigned Variants[] = {AMDGPUAsmVariants::SDWA, in getMatchedVariants()
3246 SIInstrFlags::SDWA)) { in validateConstantBusLimitations()
3537 if ((Desc.TSFlags & SIInstrFlags::SDWA) == 0 || !IsMovrelsSDWAOpcode(Opc)) in validateMovrels()
3785 const auto Enc = VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA; in validateLdsDirect()
3799 if (IsRevOpcode(Opcode) || (Desc.TSFlags & SIInstrFlags::SDWA)) in validateLdsDirect()
8022 using namespace llvm::AMDGPU::SDWA; in parseSDWASel()
8056 using namespace llvm::AMDGPU::SDWA; in parseSDWADstUnused()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp1363 using namespace AMDGPU::SDWA; in decodeSDWASrc()
1411 using namespace AMDGPU::SDWA; in decodeSDWAVopcDst()
/netbsd-src/external/apache2/llvm/dist/llvm/docs/AMDGPU/
H A DAMDGPUAsmGFX10.rst770 SDWA section in Instructions