| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeTypes.h | 81 bool IgnoreNodeResults(SDNode *N) const { in IgnoreNodeResults() 138 SmallVector<SDNode*, 128> Worklist; 180 void NoteDeletion(SDNode *Old, SDNode *New) { in NoteDeletion() 211 SDNode *AnalyzeNewNode(SDNode *N); 221 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult); 222 bool CustomWidenLowerNode(SDNode *N, EVT VT); 227 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo); 231 std::pair<SDValue, SDValue> ExpandAtomic(SDNode *Node); 293 void PromoteIntegerResult(SDNode *N, unsigned ResNo); 294 SDValue PromoteIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo); [all …]
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| H A D | SelectionDAGPrinter.cpp | 41 return ((const SDNode *) Node)->getNumValues(); in numEdgeDestLabels() 45 return ((const SDNode *) Node)->getValueType(i).getEVTString(); in getEdgeDestLabel() 50 return itostr(I - SDNodeIterator::begin((const SDNode *) Node)); in getEdgeSourceLabel() 66 SDNode *TargetNode = *I; in getEdgeTarget() 80 static std::string getNodeIdentifierLabel(const SDNode *Node, in getNodeIdentifierLabel() 107 static std::string getSimpleNodeLabel(const SDNode *Node, in getSimpleNodeLabel() 116 std::string getNodeLabel(const SDNode *Node, const SelectionDAG *Graph); 117 static std::string getNodeAttributes(const SDNode *N, in getNodeAttributes() 141 std::string DOTGraphTraits<SelectionDAG*>::getNodeLabel(const SDNode *Node, in getNodeLabel() 195 void SelectionDAG::setGraphAttrs(const SDNode *N, const char *Attrs) { in setGraphAttrs() [all …]
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| H A D | ScheduleDAGSDNodes.cpp | 69 SUnit *ScheduleDAGSDNodes::newSUnit(SDNode *N) { in newSUnit() 111 static void CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op, in CheckForPhysRegDependency() 140 static void CloneNodeWithValues(SDNode *N, SelectionDAG *DAG, ArrayRef<EVT> VTs, in CloneNodeWithValues() 161 static bool AddGlue(SDNode *N, SDValue Glue, bool AddGlue, SelectionDAG *DAG) { in AddGlue() 162 SDNode *GlueDestNode = Glue.getNode(); in AddGlue() 186 static void RemoveUnusedGlue(SDNode *N, SelectionDAG *DAG) { in RemoveUnusedGlue() 200 void ScheduleDAGSDNodes::ClusterNeighboringLoads(SDNode *Node) { in ClusterNeighboringLoads() 211 auto hasTiedInput = [this](const SDNode *N) { in ClusterNeighboringLoads() 223 SmallPtrSet<SDNode*, 16> Visited; in ClusterNeighboringLoads() 225 DenseMap<long long, SDNode*> O2SMap; // Map from offset to SDNode. in ClusterNeighboringLoads() [all …]
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| H A D | LegalizeFloatTypes.cpp | 48 void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) { in SoftenFloatResult() 156 SDValue DAGTypeLegalizer::SoftenFloatRes_Unary(SDNode *N, RTLIB::Libcall LC) { in SoftenFloatRes_Unary() 175 SDValue DAGTypeLegalizer::SoftenFloatRes_Binary(SDNode *N, RTLIB::Libcall LC) { in SoftenFloatRes_Binary() 196 SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N) { in SoftenFloatRes_BITCAST() 200 SDValue DAGTypeLegalizer::SoftenFloatRes_FREEZE(SDNode *N) { in SoftenFloatRes_FREEZE() 206 SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N, in SoftenFloatRes_MERGE_VALUES() 212 SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) { in SoftenFloatRes_BUILD_PAIR() 221 SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(SDNode *N) { in SoftenFloatRes_ConstantFP() 245 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo) { in SoftenFloatRes_EXTRACT_VECTOR_ELT() 252 SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N) { in SoftenFloatRes_FABS() [all …]
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| H A D | SDNodeDbgValue.h | 24 class SDNode; variable 41 SDNode *getSDNode() const { in getSDNode() 70 static SDDbgOperand fromNode(SDNode *Node, unsigned ResNo) { in fromNode() 104 SDNode *Node; ///< Valid for expressions. 113 SDDbgOperand(SDNode *N, unsigned R) : kind(SDNODE) { in SDDbgOperand() 144 SDNode **AdditionalDependencies; 156 ArrayRef<SDDbgOperand> L, ArrayRef<SDNode *> Dependencies, in SDDbgValue() 161 AdditionalDependencies(Alloc.Allocate<SDNode *>(Dependencies.size())), in SDDbgValue() 193 SmallVector<SDNode *> getSDNodes() const { in getSDNodes() 194 SmallVector<SDNode *> Dependencies; in getSDNodes() [all …]
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| H A D | InstrEmitter.h | 47 void EmitCopyFromReg(SDNode *Node, unsigned ResNo, 52 void CreateVirtualRegisters(SDNode *Node, 92 void EmitSubregNode(SDNode *Node, DenseMap<SDValue, Register> &VRBaseMap, 99 void EmitCopyToRegClassNode(SDNode *Node, 104 void EmitRegSequence(SDNode *Node, DenseMap<SDValue, Register> &VRBaseMap, 110 static unsigned CountResults(SDNode *Node); 132 void EmitNode(SDNode *Node, bool IsClone, bool IsCloned, in EmitNode() 152 void EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned, 154 void EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
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| H A D | LegalizeVectorOps.cpp | 78 SDValue TranslateLegalizeResults(SDValue Op, SDNode *Result); 88 bool LowerOperationWrapper(SDNode *N, SmallVectorImpl<SDValue> &Results); 91 SDValue UnrollVSETCC(SDNode *Node); 97 void Expand(SDNode *Node, SmallVectorImpl<SDValue> &Results); 101 void ExpandFP_TO_UINT(SDNode *Node, SmallVectorImpl<SDValue> &Results); 105 void ExpandUINT_TO_FLOAT(SDNode *Node, SmallVectorImpl<SDValue> &Results); 108 SDValue ExpandSEXTINREG(SDNode *Node); 115 SDValue ExpandANY_EXTEND_VECTOR_INREG(SDNode *Node); 122 SDValue ExpandSIGN_EXTEND_VECTOR_INREG(SDNode *Node); 128 SDValue ExpandZERO_EXTEND_VECTOR_INREG(SDNode *Node); [all …]
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| H A D | ScheduleDAGFast.cpp | 214 SDNode *N = SU->getNode(); in CopyAndMoveSuccessors() 234 SmallVector<SDNode*, 2> NewNodes; in CopyAndMoveSuccessors() 242 SDNode *LoadNode = NewNodes[0]; in CopyAndMoveSuccessors() 384 SUnit *CopyFromSU = newSUnit(static_cast<SDNode *>(nullptr)); in InsertCopiesAndMoveSuccs() 388 SUnit *CopyToSU = newSUnit(static_cast<SDNode *>(nullptr)); in InsertCopiesAndMoveSuccs() 425 static MVT getPhysicalRegisterVT(SDNode *N, unsigned Reg, in getPhysicalRegisterVT() 481 for (SDNode *Node = SU->getNode(); Node; Node = Node->getGluedNode()) { in DelayForLiveRegsBottomUp() 653 std::vector<SDNode*> Sequence; 654 DenseMap<SDNode*, SDNode*> GluedMap; // Cache glue to its user 656 void ScheduleNode(SDNode *N); [all …]
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| H A D | ScheduleDAGSDNodes.h | 65 static bool isPassiveNode(SDNode *Node) { in isPassiveNode() 86 SUnit *newSUnit(SDNode *N); 107 virtual void computeOperandLatency(SDNode *Def, SDNode *Use, 140 const SDNode *Node; 155 const SDNode *GetNode() const { in GetNode() 178 void ClusterNeighboringLoads(SDNode *Node);
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.h | 55 void Select(SDNode *N) override; 78 MachineSDNode *LoadInstrForLoadIntrinsic(SDNode *IntN); 82 SDNode *StoreInstrForLoadIntrinsic(MachineSDNode *LoadN, SDNode *IntN); 84 void SelectFrameIndex(SDNode *N); 91 bool SelectBrevLdIntrinsic(SDNode *IntN); 92 bool SelectNewCircIntrinsic(SDNode *IntN); 93 void SelectLoad(SDNode *N); 96 void SelectStore(SDNode *N); 97 void SelectSHL(SDNode *N); 98 void SelectZeroExtend(SDNode *N); [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrFragmentsSIMD.td | 18 def MMX_X86movd2w : SDNode<"X86ISD::MMX_MOVD2W", SDTypeProfile<1, 1, 21 def MMX_X86movw2d : SDNode<"X86ISD::MMX_MOVW2D", SDTypeProfile<1, 1, 38 def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>; 39 def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>; 40 def X86fmins : SDNode<"X86ISD::FMINS", SDTFPBinOp>; 41 def X86fmaxs : SDNode<"X86ISD::FMAXS", SDTFPBinOp>; 44 def X86fminc : SDNode<"X86ISD::FMINC", SDTFPBinOp, 46 def X86fmaxc : SDNode<"X86ISD::FMAXC", SDTFPBinOp, 49 def X86fand : SDNode<"X86ISD::FAND", SDTFPBinOp, 51 def X86for : SDNode<"X86ISD::FOR", SDTFPBinOp, [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.h | 58 void Select(SDNode *N) override; 59 bool tryIntrinsicNoChain(SDNode *N); 60 bool tryIntrinsicChain(SDNode *N); 61 void SelectTexSurfHandle(SDNode *N); 62 bool tryLoad(SDNode *N); 63 bool tryLoadVector(SDNode *N); 64 bool tryLDGLDU(SDNode *N); 65 bool tryStore(SDNode *N); 66 bool tryStoreVector(SDNode *N); 67 bool tryLoadParam(SDNode *N); [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstrInfo.td | 68 def AMDGPUif : SDNode<"AMDGPUISD::IF", AMDGPUIfOp, [SDNPHasChain]>; 69 def AMDGPUelse : SDNode<"AMDGPUISD::ELSE", AMDGPUElseOp, [SDNPHasChain]>; 70 def AMDGPUloop : SDNode<"AMDGPUISD::LOOP", AMDGPULoopOp, [SDNPHasChain]>; 72 def callseq_start : SDNode<"ISD::CALLSEQ_START", 77 def callseq_end : SDNode<"ISD::CALLSEQ_END", 82 def AMDGPUcall : SDNode<"AMDGPUISD::CALL", 88 def AMDGPUtc_return: SDNode<"AMDGPUISD::TC_RETURN", 93 def AMDGPUtrap : SDNode<"AMDGPUISD::TRAP", 98 def AMDGPUconstdata_ptr : SDNode< 104 def AMDGPUdwordaddr : SDNode<"AMDGPUISD::DWORDADDR", SDTIntUnaryOp>; [all …]
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| H A D | SIISelLowering.h | 154 SDNode *adjustWritemask(MachineSDNode *&N, SelectionDAG &DAG) const; 156 SDValue performUCharToFloatCombine(SDNode *N, 158 SDValue performSHLPtrCombine(SDNode *N, 169 SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const; 170 SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const; 171 SDValue performXorCombine(SDNode *N, DAGCombinerInfo &DCI) const; 172 SDValue performZeroExtendCombine(SDNode *N, DAGCombinerInfo &DCI) const; 173 SDValue performSignExtendInRegCombine(SDNode *N, DAGCombinerInfo &DCI) const; 174 SDValue performClassCombine(SDNode *N, DAGCombinerInfo &DCI) const; 177 SDValue performFCanonicalizeCombine(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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| H A D | AMDGPUISelDAGToDAG.cpp | 77 static SDNode *packConstantV2I16(const SDNode *N, SelectionDAG &DAG, in packConstantV2I16() 94 static SDNode *packNegConstantV2I16(const SDNode *N, SelectionDAG &DAG) { in packNegConstantV2I16() 128 bool matchLoadD16FromBuildVector(SDNode *N) const; 132 void Select(SDNode *N) override; 137 void SelectBuildVector(SDNode *N, unsigned RegClassID); 142 bool isInlineImmediate(const SDNode *N, bool Negated = false) const; 143 bool isNegInlineImmediate(const SDNode *N) const { in isNegInlineImmediate() 163 bool isVGPRImm(const SDNode *N) const; 164 bool isUniformLoad(const SDNode *N) const; 165 bool isUniformBr(const SDNode *N) const; [all …]
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| H A D | AMDGPUISelLowering.h | 75 SDValue performLoadCombine(SDNode *N, DAGCombinerInfo &DCI) const; 76 SDValue performStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const; 77 SDValue performAssertSZExtCombine(SDNode *N, DAGCombinerInfo &DCI) const; 78 SDValue performIntrinsicWOChainCombine(SDNode *N, DAGCombinerInfo &DCI) const; 83 SDValue performShlCombine(SDNode *N, DAGCombinerInfo &DCI) const; 84 SDValue performSraCombine(SDNode *N, DAGCombinerInfo &DCI) const; 85 SDValue performSrlCombine(SDNode *N, DAGCombinerInfo &DCI) const; 86 SDValue performTruncateCombine(SDNode *N, DAGCombinerInfo &DCI) const; 87 SDValue performMulCombine(SDNode *N, DAGCombinerInfo &DCI) const; 88 SDValue performMulhsCombine(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGISel.h | 84 virtual void Select(SDNode *N) = 0; 99 virtual bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const; 105 static bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root, 109 static void InvalidateNodeId(SDNode *N); 110 static int getUninvalidatedNodeId(SDNode *N); 112 static void EnforceNodeIdInvariant(SDNode *N); 221 void ReplaceUses(SDNode *F, SDNode *T) { in ReplaceUses() 227 void ReplaceNode(SDNode *F, SDNode *T) { in ReplaceNode() 272 virtual bool CheckNodePredicate(SDNode *N, unsigned PredNo) const { in CheckNodePredicate() 282 SDNode *N, unsigned PredNo, in CheckNodePredicateWithOperands() [all …]
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| H A D | SelectionDAGNodes.h | 67 class SDNode; variable 72 void checkForCycles(const SDNode *N, const SelectionDAG *DAG = nullptr, 91 bool isConstantSplatVector(const SDNode *N, APInt &SplatValue); 96 bool isConstantSplatVectorAllOnes(const SDNode *N, 102 bool isConstantSplatVectorAllZeros(const SDNode *N, 107 bool isBuildVectorAllOnes(const SDNode *N); 111 bool isBuildVectorAllZeros(const SDNode *N); 115 bool isBuildVectorOfConstantSDNodes(const SDNode *N); 119 bool isBuildVectorOfConstantFPSDNodes(const SDNode *N); 123 bool allOperandsUndef(const SDNode *N); [all …]
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| H A D | SelectionDAG.h | 133 template <> struct ilist_alloc_traits<SDNode> { 134 static void deleteNode(SDNode *) { 155 using DbgValMapType = DenseMap<const SDNode *, SmallVector<SDDbgValue *, 2>>; 169 void erase(const SDNode *Node); 185 ArrayRef<SDDbgValue*> getSDDbgValues(const SDNode *Node) const { 237 SDNode EntryNode; 243 ilist<SDNode> AllNodes; 247 using NodeAllocatorType = RecyclingAllocator<BumpPtrAllocator, SDNode, 256 FoldingSet<SDNode> CSEMap; 277 DenseMap<const SDNode *, CallSiteDbgInfo> SDCallSiteDbgInfo; [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 46 // SDTCisVTSmallerThanOp - The specified operand is a VT SDNode, and its type is 312 class SDNode<string opcode, SDTypeProfile typeprof, 313 list<SDNodeProperty> props = [], string sdclass = "SDNode"> 327 def imm : SDNode<"ISD::Constant" , SDTIntLeaf , [], "ConstantSDNode">; 328 def timm : SDNode<"ISD::TargetConstant",SDTIntLeaf, [], "ConstantSDNode">; 329 def fpimm : SDNode<"ISD::ConstantFP", SDTFPLeaf , [], "ConstantFPSDNode">; 330 def vt : SDNode<"ISD::VALUETYPE" , SDTOther , [], "VTSDNode">; 331 def bb : SDNode<"ISD::BasicBlock", SDTOther , [], "BasicBlockSDNode">; 332 def cond : SDNode<"ISD::CONDCODE" , SDTOther , [], "CondCodeSDNode">; 333 def undef : SDNode<"ISD::UNDEF" , SDTUNDEF , []>; [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZOperators.td | 237 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 239 def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 242 def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 245 def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone, 247 def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 250 def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 253 def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 256 def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 259 def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 260 def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", [all …]
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| H A D | SystemZISelLowering.h | 513 void LowerOperationWrapper(SDNode *N, SmallVectorImpl<SDValue> &Results, 515 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results, 536 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 639 SDValue combineZERO_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const; 640 SDValue combineSIGN_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const; 641 SDValue combineSIGN_EXTEND_INREG(SDNode *N, DAGCombinerInfo &DCI) const; 642 SDValue combineMERGE(SDNode *N, DAGCombinerInfo &DCI) const; 644 SDValue combineLOAD(SDNode *N, DAGCombinerInfo &DCI) const; 645 SDValue combineSTORE(SDNode *N, DAGCombinerInfo &DCI) const; 646 SDValue combineVECTOR_SHUFFLE(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/IR/ |
| H A D | VPIntrinsics.def | 35 // Register a new VP SDNode and begin its property scope. 36 // When the SDNode scope is nested within a VP intrinsic scope, it is implicitly registered as the … 37 // There is one VP intrinsic that maps directly to one SDNode that goes by the 39 // scopes for both the VPIntrinsic and the SDNode at once. 41 // \p LEGALPOS The operand position of the SDNode that is used for legalizing 42 // this SDNode. This can be `-1`, in which case the return type of 43 // the SDNode is used. 44 // \p TDNAME The name of the TableGen definition of this SDNode. 51 // End the property scope of a new VP SDNode. 56 // Helper macros for the common "1:1 - Intrinsic : SDNode" case. [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRISelDAGToDAG.cpp | 38 bool SelectAddr(SDNode *Op, SDValue N, SDValue &Base, SDValue &Disp); 40 bool selectIndexedLoad(SDNode *N); 50 void Select(SDNode *N) override; 51 bool trySelect(SDNode *N); 53 template <unsigned NodeType> bool select(SDNode *N); 54 bool selectMultiplication(SDNode *N); 64 bool AVRDAGToDAGISel::SelectAddr(SDNode *Op, SDValue N, SDValue &Base, in SelectAddr() 121 bool AVRDAGToDAGISel::selectIndexedLoad(SDNode *N) { in selectIndexedLoad() 159 SDNode *ResNode = CurDAG->getMachineNode(Opcode, SDLoc(N), VT, in selectIndexedLoad() 305 template <> bool AVRDAGToDAGISel::select<ISD::FrameIndex>(SDNode *N) { in select() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.h | 644 int isVSLDOIShuffleMask(SDNode *N, unsigned ShuffleKind, 665 unsigned getSplatIdxForPPCMnemonics(SDNode *N, unsigned EltSize, 672 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG); 801 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, 839 Sched::Preference getSchedulingPreference(SDNode *N) const override; 848 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results, 851 SDValue expandVSXLoadForLE(SDNode *N, DAGCombinerInfo &DCI) const; 852 SDValue expandVSXStoreForLE(SDNode *N, DAGCombinerInfo &DCI) const; 854 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 856 SDValue BuildSDIVPow2(SDNode *N, const APInt &Divisor, SelectionDAG &DAG, [all …]
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