| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | RDFRegisters.h | 71 struct RegisterRef { struct 75 RegisterRef() = default; argument 76 explicit RegisterRef(RegisterId R, LaneBitmask M = LaneBitmask::getAll()) 83 bool operator== (const RegisterRef &RR) const { argument 87 bool operator!= (const RegisterRef &RR) const { 91 bool operator< (const RegisterRef &RR) const { 118 bool alias(RegisterRef RA, RegisterRef RB) const { in alias() argument 126 RegisterRef getRefForUnit(uint32_t U) const { in getRefForUnit() 127 return RegisterRef(UnitInfos[U].Reg, UnitInfos[U].Mask); in getRefForUnit() 138 RegisterRef mapTo(RegisterRef RR, unsigned R) const; [all …]
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| H A D | RDFLiveness.h | 83 NodeList getAllReachingDefs(RegisterRef RefRR, NodeAddr<RefNode*> RefA, 91 NodeList getAllReachingDefs(RegisterRef RefRR, NodeAddr<RefNode*> RefA) { 95 NodeSet getAllReachedUses(RegisterRef RefRR, NodeAddr<DefNode*> DefA, 98 NodeSet getAllReachedUses(RegisterRef RefRR, NodeAddr<DefNode*> DefA) { 102 std::pair<NodeSet,bool> getAllReachingDefsRec(RegisterRef RefRR, 105 NodeAddr<RefNode*> getNearestAliasedRef(RegisterRef RefRR, 164 std::pair<NodeSet,bool> getAllReachingDefsRecImpl(RegisterRef RefRR,
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| H A D | RDFGraph.h | 412 using RegisterSet = std::set<RegisterRef>; 518 RegisterRef getRegRef(const DataFlowGraph &G) const; 525 void setRegRef(RegisterRef RR, DataFlowGraph &G); 553 NodeAddr<RefNode*> getNextRef(RegisterRef RR, Predicate P, bool NextOnly, 740 PackedRegisterRef pack(RegisterRef RR) { in pack() 743 PackedRegisterRef pack(RegisterRef RR) const { in pack() 746 RegisterRef unpack(PackedRegisterRef PR) const { in unpack() 747 return RegisterRef(PR.Reg, LMI.getLaneMaskForIndex(PR.MaskId)); in unpack() 750 RegisterRef makeRegRef(unsigned Reg, unsigned Sub) const; 751 RegisterRef makeRegRef(const MachineOperand &Op) const; [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | RDFRegisters.cpp | 120 if (MI != Reg && aliasMM(RegisterRef(Reg), RegisterRef(MI))) in getAliasSet() 130 if (aliasRM(RegisterRef(Reg), RegisterRef(MI))) in getAliasSet() 136 bool PhysicalRegisterInfo::aliasRR(RegisterRef RA, RegisterRef RB) const { in aliasRR() 167 bool PhysicalRegisterInfo::aliasRM(RegisterRef RR, RegisterRef RM) const { in aliasRM() 202 bool PhysicalRegisterInfo::aliasMM(RegisterRef RM, RegisterRef RN) const { in aliasMM() 230 RegisterRef PhysicalRegisterInfo::mapTo(RegisterRef RR, unsigned R) const { in mapTo() 234 return RegisterRef(R, TRI.composeSubRegIndexLaneMask(Idx, RR.Mask)); in mapTo() 240 return RegisterRef(R, M & RCM); in mapTo() 245 bool RegisterAggr::hasAliasOf(RegisterRef RR) const { in hasAliasOf() 258 bool RegisterAggr::hasCoverOf(RegisterRef RR) const { in hasCoverOf() [all …]
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| H A D | RDFLiveness.cpp | 109 NodeList Liveness::getAllReachingDefs(RegisterRef RefRR, in getAllReachingDefs() 148 RegisterRef RR = TA.Addr->getRegRef(DFG); in getAllReachingDefs() 277 RegisterRef QR = DA.Addr->getRegRef(DFG); in getAllReachingDefs() 309 Liveness::getAllReachingDefsRec(RegisterRef RefRR, NodeAddr<RefNode*> RefA, in getAllReachingDefsRec() 315 Liveness::getAllReachingDefsRecImpl(RegisterRef RefRR, NodeAddr<RefNode*> RefA, in getAllReachingDefsRecImpl() 362 NodeAddr<RefNode*> Liveness::getNearestAliasedRef(RegisterRef RefRR, in getNearestAliasedRef() 419 NodeSet Liveness::getAllReachedUses(RegisterRef RefRR, in getAllReachedUses() 435 RegisterRef UR = UA.Addr->getRegRef(DFG); in getAllReachedUses() 446 RegisterRef DR = DA.Addr->getRegRef(DFG); in getAllReachedUses() 517 RegisterRef R = A.Addr->getRegRef(DFG); in computePhiInfo() [all …]
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| H A D | RDFGraph.cpp | 57 raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterRef> &P) { in operator <<() 111 << Print<RegisterRef>(RA.Addr->getRegRef(G), G) << '>'; in printRefHeader() 310 OS << ' ' << Print<RegisterRef>(I, P.G); in operator <<() 324 << '<' << Print<RegisterRef>(I->Addr->getRegRef(P.G), P.G) << '>'; in operator <<() 408 RegisterRef RefNode::getRegRef(const DataFlowGraph &G) const { in getRegRef() 418 void RefNode::setRegRef(RegisterRef RR, DataFlowGraph &G) { in setRegRef() 755 LR.insert(RegisterRef(R)); in getLandingPadLiveIns() 758 LR.insert(RegisterRef(R)); in getLandingPadLiveIns() 816 RegisterRef RR, NodeAddr<BlockNode*> PredB, uint16_t Flags) { in newPhiUse() 832 RegisterRef RR, uint16_t Flags) { in newDef() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonExpandCondsets.cpp | 178 struct RegisterRef { struct in __anon198387370111::HexagonExpandCondsets 179 RegisterRef(const MachineOperand &Op) : Reg(Op.getReg()), in RegisterRef() argument 181 RegisterRef(unsigned R = 0, unsigned S = 0) : Reg(R), Sub(S) {} in RegisterRef() function 183 bool operator== (RegisterRef RR) const { in operator ==() argument 186 bool operator!= (RegisterRef RR) const { return !operator==(RR); } in operator !=() argument 187 bool operator< (RegisterRef RR) const { in operator <() argument 203 void addRefToMap(RegisterRef RR, ReferenceMap &Map, unsigned Exec); 204 bool isRefInMap(RegisterRef, ReferenceMap &Map, unsigned Exec); 222 MachineInstr *getReachingDefForPred(RegisterRef RD, 230 void renameInRange(RegisterRef RO, RegisterRef RN, unsigned PredR, [all …]
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| H A D | RDFCopy.cpp | 46 RegisterRef DstR = DFG.makeRegRef(Dst.getReg(), Dst.getSubReg()); in interpretAsCopy() 47 RegisterRef SrcR = DFG.makeRegRef(Src.getReg(), Src.getSubReg()); in interpretAsCopy() 88 NodeId CopyPropagation::getLocalReachingDef(RegisterRef RefRR, in getLocalReachingDef() 110 dbgs() << ' ' << Print<RegisterRef>(J.first, DFG) << '=' in run() 111 << Print<RegisterRef>(J.second, DFG); in run() 121 auto MinPhysReg = [this] (RegisterRef RR) -> unsigned { in run() 145 RegisterRef DR = DA.Addr->getRegRef(DFG); in run() 149 RegisterRef SR = FR->second; in run() 174 dbgs() << "Can replace " << Print<RegisterRef>(DR, DFG) in run() 175 << " with " << Print<RegisterRef>(SR, DFG) << " in " in run()
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| H A D | HexagonBitSimplify.cpp | 211 static bool getSubregMask(const BitTracker::RegisterRef &RR, 218 BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH, 227 const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI); 228 static bool isTransparentCopy(const BitTracker::RegisterRef &RD, 229 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI); 407 bool HexagonBitSimplify::getSubregMask(const BitTracker::RegisterRef &RR, in getSubregMask() 435 BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH, in parseRegSequence() 898 const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI) { in getFinalVRegClass() 928 bool HexagonBitSimplify::isTransparentCopy(const BitTracker::RegisterRef &RD, in isTransparentCopy() 929 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI) { in isTransparentCopy() [all …]
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| H A D | BitTracker.h | 37 struct RegisterRef; 53 RegisterCell get(RegisterRef RR) const; 54 void put(RegisterRef RR, const RegisterCell &RC); 55 void subst(RegisterRef OldRR, RegisterRef NewRR); 141 struct BitTracker::RegisterRef { struct 142 RegisterRef(Register R = 0, unsigned S = 0) : Reg(R), Sub(S) {} in Reg() argument 143 RegisterRef(const MachineOperand &MO) in RegisterRef() argument 397 uint16_t getRegBitWidth(const RegisterRef &RR) const; 399 RegisterCell getCell(const RegisterRef &RR, const CellMapType &M) const; 400 void putCell(const RegisterRef &RR, RegisterCell RC, CellMapType &M) const; [all …]
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| H A D | RDFCopy.h | 38 using EqualityMap = std::map<RegisterRef, RegisterRef>; 54 NodeId getLocalReachingDef(RegisterRef RefRR, NodeAddr<InstrNode*> IA);
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| H A D | HexagonBlockRanges.cpp | 262 RegisterRef R, const MachineRegisterInfo &MRI, in expandToSubRegs() 292 std::map<RegisterRef,IndexType> LastDef, LastUse; in computeInitialLiveRanges() 303 auto closeRange = [&LastUse,&LastDef,&LiveMap] (RegisterRef R) -> void { in computeInitialLiveRanges() 323 RegisterRef R = { Op.getReg(), Op.getSubReg() }; in computeInitialLiveRanges() 339 RegisterRef R = { Op.getReg(), Op.getSubReg() }; in computeInitialLiveRanges() 364 RegisterRef R = { PR, 0 }; in computeInitialLiveRanges() 371 for (RegisterRef R : Defs) in computeInitialLiveRanges() 375 for (RegisterRef S : Defs) { in computeInitialLiveRanges() 384 for (RegisterRef S : Clobbers) { in computeInitialLiveRanges() 435 auto addDeadRanges = [&IndexMap,&LiveMap,&DeadMap] (RegisterRef R) -> void { in computeDeadMap()
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| H A D | HexagonBlockRanges.h | 35 struct RegisterRef { struct 39 bool operator<(RegisterRef R) const { 43 using RegisterSet = std::set<RegisterRef>; 145 using RegToRangeMap = std::map<RegisterRef, RangeList>; 149 static RegisterSet expandToSubRegs(RegisterRef R,
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| H A D | BitTracker.cpp | 329 uint16_t BT::MachineEvaluator::getRegBitWidth(const RegisterRef &RR) const { in getRegBitWidth() 348 BT::RegisterCell BT::MachineEvaluator::getCell(const RegisterRef &RR, in getCell() 375 void BT::MachineEvaluator::putCell(const RegisterRef &RR, RegisterCell RC, in putCell() 725 RegisterRef RD = MI.getOperand(0); in evaluate() 727 RegisterRef RS = MI.getOperand(1); in evaluate() 729 RegisterRef RT = MI.getOperand(3); in evaluate() 744 RegisterRef RD = MI.getOperand(0); in evaluate() 745 RegisterRef RS = MI.getOperand(1); in evaluate() 804 RegisterRef DefRR(MD); in visitPHI() 825 RegisterRef RU = PI.getOperand(i); in visitPHI() [all …]
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| H A D | HexagonBitTracker.h | 27 using RegisterRef = BitTracker::RegisterRef; member
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| H A D | HexagonOptAddrMode.cpp | 167 RegisterRef OffsetRR; in canRemoveAddasl() 170 RegisterRef RR = UA.Addr->getRegRef(*DFG); in canRemoveAddasl() 216 RegisterRef UR = UN.Addr->getRegRef(*DFG); in allValidCandidates() 249 RegisterRef DR = DA.Addr->getRegRef(*DFG); in getAllRealUses() 269 if (!DFG->getPRI().alias(RegisterRef(I.first), DR)) in getAllRealUses() 287 RegisterRef LRExtRR; in isSafeToExtLR() 292 RegisterRef RR = UA.Addr->getRegRef(*DFG); in isSafeToExtLR()
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| H A D | HexagonBitTracker.cpp | 94 uint16_t RW = getRegBitWidth(RegisterRef(Reg, Sub)); in mask() 161 std::vector<BT::RegisterRef> Vector; 168 Vector[i] = BT::RegisterRef(MO); in RegisterRefs() 176 const BT::RegisterRef &operator[](unsigned n) const { in operator []() 963 BT::RegisterRef PD(DefR, 0); in evaluate() 1018 RegisterRef PR = BI.getOperand(0); in evaluate() 1189 RegisterRef RD = MD; in evaluateLoad() 1218 RegisterRef RD = MI.getOperand(0); in evaluateFormalCopy() 1219 RegisterRef RS = MI.getOperand(1); in evaluateFormalCopy()
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| H A D | HexagonRDFOpt.cpp | 113 auto mapRegs = [&EM] (RegisterRef DstR, RegisterRef SrcR) -> void { in INITIALIZE_PASS_DEPENDENCY()
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| H A D | HexagonFrameLowering.cpp | 2457 HexagonBlockRanges::RegisterRef SrcRR = { SrcOp.getReg(), in optimizeSpillSlots() 2526 HexagonBlockRanges::RegisterRef FoundRR = { FoundR, 0 }; in optimizeSpillSlots()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86LoadValueInjectionLoadHardening.cpp | 370 RegisterRef DefReg = Def.Addr->getRegRef(DFG); in getGadgetGraph() 376 if (DFG.getPRI().alias(RegisterRef(I.first), DefReg)) { in getGadgetGraph()
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