| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/AsmParser/ |
| H A D | SystemZAsmParser.cpp | 53 enum RegisterKind { enum
106 RegisterKind Kind;
169 createReg(RegisterKind Kind, unsigned Num, SMLoc StartLoc, SMLoc EndLoc) { in createReg()
184 createMem(MemoryKind MemKind, RegisterKind RegKind, unsigned Base, in createMem()
222 bool isReg(RegisterKind RegKind) const { in isReg()
263 bool isMem(MemoryKind MemKind, RegisterKind RegKind) const { in isMem()
266 bool isMemDisp12(MemoryKind MemKind, RegisterKind RegKind) const { in isMemDisp12()
269 bool isMemDisp20(MemoryKind MemKind, RegisterKind RegKind) const { in isMemDisp20()
272 bool isMemDisp12Len4(RegisterKind RegKind) const { in isMemDisp12Len4()
275 bool isMemDisp12Len8(RegisterKind RegKind) const { in isMemDisp12Len8()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/LiveDebugValues/ |
| H A D | VarLocBasedImpl.cpp | 331 RegisterKind, enumerator
368 case MachineLocKind::RegisterKind: in operator ==()
386 case MachineLocKind::RegisterKind: in operator <()
439 Kind = MachineLocKind::RegisterKind; in GetLocForOp()
461 VL.Locs[0].Kind == MachineLocKind::RegisterKind); in CreateEntryLoc()
477 VL.Locs[0].Kind == MachineLocKind::RegisterKind); in CreateEntryBackupLoc()
492 VL.Locs[0].Kind == MachineLocKind::RegisterKind); in CreateEntryCopyBackupLoc()
506 VL.Locs[I].Kind = MachineLocKind::RegisterKind; in CreateCopyLoc()
547 case MachineLocKind::RegisterKind: in BuildDbgValue()
620 RegML.Kind = MachineLocKind::RegisterKind; in usesReg()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VETargetTransformInfo.h | 53 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const { in getRegisterBitWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUTargetTransformInfo.h | 124 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind Vector) const;
247 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind Vector) const;
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| H A D | AMDGPUTargetTransformInfo.cpp | 318 GCNTTIImpl::getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const { in getRegisterBitWidth()
1262 R600TTIImpl::getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const { in getRegisterBitWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyTargetTransformInfo.h | 60 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const;
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| H A D | WebAssemblyTargetTransformInfo.cpp | 40 TargetTransformInfo::RegisterKind K) const { in getRegisterBitWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXTargetTransformInfo.h | 74 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const { in getRegisterBitWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 46 enum RegisterKind { IS_UNKNOWN, IS_VGPR, IS_SGPR, IS_AGPR, IS_TTMP, IS_SPECIAL }; enum
1153 void usesRegister(RegisterKind RegKind, unsigned DwordRegIndex, unsigned RegWidth) { in usesRegister()
1232 RegisterKind RegKind, unsigned Reg1, SMLoc Loc);
1233 bool ParseAMDGPURegister(RegisterKind &RegKind, unsigned &Reg,
1236 bool ParseAMDGPURegister(RegisterKind &RegKind, unsigned &Reg,
1239 unsigned ParseRegularReg(RegisterKind &RegKind, unsigned &RegNum,
1242 unsigned ParseSpecialReg(RegisterKind &RegKind, unsigned &RegNum,
1245 unsigned ParseRegList(RegisterKind &RegKind, unsigned &RegNum,
1248 unsigned getRegularReg(RegisterKind RegKind,
1255 Optional<StringRef> getGprCountSymbolName(RegisterKind RegKind);
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.h | 60 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const { in getRegisterBitWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZTargetTransformInfo.h | 68 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const;
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| H A D | SystemZTargetTransformInfo.cpp | 329 SystemZTTIImpl::getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const { in getRegisterBitWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonTargetTransformInfo.h | 84 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const;
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| H A D | HexagonTargetTransformInfo.cpp | 102 HexagonTTIImpl::getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const { in getRegisterBitWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetTransformInfo.h | 98 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const;
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| H A D | PPCTargetTransformInfo.cpp | 876 PPCTTIImpl::getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const { in getRegisterBitWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.h | 118 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.h | 109 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const { in getRegisterBitWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.h | 159 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const { in getRegisterBitWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfo.h | 929 enum RegisterKind { RGK_Scalar, RGK_FixedWidthVector, RGK_ScalableVector }; enum
932 TypeSize getRegisterBitWidth(RegisterKind K) const;
1574 virtual TypeSize getRegisterBitWidth(RegisterKind K) const = 0;
2020 TypeSize getRegisterBitWidth(RegisterKind K) const override { in getRegisterBitWidth()
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| H A D | TargetTransformInfoImpl.h | 390 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const { in getRegisterBitWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 209 enum RegisterKind { enum in __anon6f8db8bd0211::SparcOperand
239 RegisterKind Kind;
442 Op->Reg.Kind = (SparcOperand::RegisterKind)Kind; in CreateReg()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 378 RegKind RegisterKind; member
1225 VectorList.RegisterKind == VectorKind; in isImplicitlyTypedVectorList()
1235 if (VectorList.RegisterKind != VectorKind) in isTypedVectorList()
1916 unsigned ElementWidth, RegKind RegisterKind, SMLoc S, SMLoc E, in CreateVectorList() argument
1923 Op->VectorList.RegisterKind = RegisterKind; in CreateVectorList()
5687 RegKind RegisterKind = RegKind::Scalar; in parseDirectiveReq() local
5693 RegisterKind = RegKind::NeonVector; in parseDirectiveReq()
5705 RegisterKind = RegKind::SVEDataVector; in parseDirectiveReq()
5719 RegisterKind = RegKind::SVEPredicateVector; in parseDirectiveReq()
5738 auto pair = std::make_pair(RegisterKind, (unsigned) RegNum); in parseDirectiveReq()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| H A D | TargetTransformInfo.cpp | 588 TargetTransformInfo::RegisterKind K) const { in getRegisterBitWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | BasicTTIImpl.h | 651 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const { in getRegisterBitWidth()
|