| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | RegisterPressure.cpp | 100 dbgs() << printVRegOrUnit(P.RegUnit, TRI); in dump()
108 dbgs() << printVRegOrUnit(P.RegUnit, TRI); in dump()
155 void RegPressureTracker::increaseRegPressure(Register RegUnit, in increaseRegPressure() argument
161 PSetIterator PSetI = MRI->getPressureSets(RegUnit); in increaseRegPressure()
170 void RegPressureTracker::decreaseRegPressure(Register RegUnit, in decreaseRegPressure() argument
173 decreaseSetPressure(CurrSetPressure, *MRI, RegUnit, PreviousMask, NewMask); in decreaseRegPressure()
363 Register RegUnit = Pair.RegUnit; in initLiveThru() local
364 if (Register::isVirtualRegister(RegUnit) in initLiveThru()
365 && !RPTracker.hasUntiedDef(RegUnit)) in initLiveThru()
366 increaseSetPressure(LiveThruPressure, *MRI, RegUnit, in initLiveThru()
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| H A D | LiveRegMatrix.cpp | 179 MCRegister RegUnit) { in query() argument
180 LiveIntervalUnion::Query &Q = Queries[RegUnit]; in query()
181 Q.init(UserTag, LR, Matrix[RegUnit]); in query()
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| H A D | MachineCopyPropagation.cpp | 178 MachineInstr *findCopyForUnit(MCRegister RegUnit, in findCopyForUnit() argument
181 auto CI = Copies.find(RegUnit); in findCopyForUnit()
189 MachineInstr *findCopyDefViaUnit(MCRegister RegUnit, in findCopyDefViaUnit() argument
191 auto CI = Copies.find(RegUnit); in findCopyDefViaUnit()
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| H A D | MachineTraceMetrics.cpp | 1144 TBI.LiveIns.push_back(LiveInReg(RI->RegUnit, RI->Cycle)); in computeInstrHeights()
1145 LLVM_DEBUG(dbgs() << ' ' << printRegUnit(RI->RegUnit, MTM.TRI) << '@' in computeInstrHeights()
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| H A D | MachineScheduler.cpp | 1118 Register Reg = P.RegUnit; in updatePressureDiffs()
1343 Register Reg = P.RegUnit; in computeCyclicCriticalPath()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | RegisterPressure.h | 40 Register RegUnit; ///< Virtual register or register unit. member
43 RegisterMaskPair(Register RegUnit, LaneBitmask LaneMask) in RegisterMaskPair()
44 : RegUnit(RegUnit), LaneMask(LaneMask) {} in RegisterMaskPair()
160 void addPressureChange(Register RegUnit, bool IsDec,
306 unsigned SparseIndex = getSparseIndexFromReg(Pair.RegUnit); in insert()
319 unsigned SparseIndex = getSparseIndexFromReg(Pair.RegUnit); in erase()
551 void increaseRegPressure(Register RegUnit, LaneBitmask PreviousMask,
553 void decreaseRegPressure(Register RegUnit, LaneBitmask PreviousMask,
564 LaneBitmask getLastUsedLanes(Register RegUnit, SlotIndex Pos) const;
565 LaneBitmask getLiveLanesAt(Register RegUnit, SlotIndex Pos) const;
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| H A D | MachineRegisterInfo.h | 625 PSetIterator getPressureSets(Register RegUnit) const;
1199 PSetIterator(Register RegUnit, const MachineRegisterInfo *MRI) { in PSetIterator() argument
1201 if (RegUnit.isVirtual()) { in PSetIterator()
1202 const TargetRegisterClass *RC = MRI->getRegClass(RegUnit); in PSetIterator()
1206 PSet = TRI->getRegUnitPressureSets(RegUnit); in PSetIterator()
1207 Weight = TRI->getRegUnitWeight(RegUnit); in PSetIterator()
1228 MachineRegisterInfo::getPressureSets(Register RegUnit) const { in getPressureSets() argument
1229 return PSetIterator(RegUnit, this); in getPressureSets()
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| H A D | MachineTraceMetrics.h | 76 unsigned RegUnit; member
81 unsigned getSparseSetIndex() const { return RegUnit; } in getSparseSetIndex()
83 LiveRegUnit(unsigned RU) : RegUnit(RU) {} in LiveRegUnit()
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| H A D | TargetRegisterInfo.h | 433 bool hasRegUnit(MCRegister Reg, Register RegUnit) const { in hasRegUnit() argument
435 if (Register(*Units) == RegUnit) in hasRegUnit()
810 virtual unsigned getRegUnitWeight(unsigned RegUnit) const = 0;
830 virtual const int *getRegUnitPressureSets(unsigned RegUnit) const = 0;
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| H A D | LiveRegMatrix.h | 151 LiveIntervalUnion::Query &query(const LiveRange &LR, MCRegister RegUnit);
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| /netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.h | 484 struct RegUnit { struct
502 RegUnit() : Weight(0), RegClassUnitSetsIdx(0), Artificial(false) { in RegUnit() argument
553 SmallVector<RegUnit, 8> RegUnits;
684 RegUnit &RU = RegUnits.back();
712 RegUnit &getRegUnit(unsigned RUID) { return RegUnits[RUID]; } in getRegUnit()
713 const RegUnit &getRegUnit(unsigned RUID) const { return RegUnits[RUID]; } in getRegUnit()
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| H A D | CodeGenRegisters.cpp | 587 for (unsigned RegUnit : RegUnits) { in getWeight() local
588 Weight += RegBank.getRegUnit(RegUnit).Weight; in getWeight()
1089 const RegUnit &RU = RegBank.getRegUnit(*UnitI); in buildRegUnitSet()
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| H A D | RegisterInfoEmitter.cpp | 250 const RegUnit &RU = RegBank.getRegUnit(UnitIdx); in EmitRegUnitPressure()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRegPressure.cpp | 232 Res, [Reg](const RegisterMaskPair &RM) { return RM.RegUnit == Reg; }); in collectVirtualRegUses()
312 auto LiveMask = LiveRegs[U.RegUnit]; in recede()
313 AtMIPressure.inc(U.RegUnit, LiveMask, LiveMask | U.LaneMask, *MRI); in recede()
334 auto &LiveMask = LiveRegs[U.RegUnit]; in recede()
337 CurPressure.inc(U.RegUnit, PrevMask, LiveMask, *MRI); in recede()
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| H A D | SIOptimizeExecMaskingPreRA.cpp | 285 LiveRange &RegUnit = LIS->getRegUnit(*UI); in optimizeElseBranch() local
286 if (RegUnit.find(StartIdx) != std::prev(RegUnit.find(EndIdx))) in optimizeElseBranch()
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| H A D | SIMachineScheduler.h | 469 InRegs.insert(RegMaskPair.RegUnit); in getInRegs()
477 OutRegs.insert(RegMaskPair.RegUnit); in getOutRegs()
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| H A D | SIWholeQuadMode.cpp | 457 for (MCRegUnitIterator RegUnit(Reg.asMCReg(), TRI); RegUnit.isValid(); in markOperand() local
458 ++RegUnit) { in markOperand()
459 LiveRange &LR = LIS->getRegUnit(*RegUnit); in markOperand()
464 markDefs(MI, LR, *RegUnit, AMDGPU::NoSubRegister, Flag, Worklist); in markOperand()
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| H A D | SIRegisterInfo.h | 258 const int *getRegUnitPressureSets(unsigned RegUnit) const override;
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| H A D | SIMachineScheduler.cpp | 332 if (Register::isVirtualRegister(RegMaskPair.RegUnit)) in initRegPressure()
333 LiveInRegs.insert(RegMaskPair.RegUnit); in initRegPressure()
359 Register Reg = RegMaskPair.RegUnit; in initRegPressure()
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| H A D | SIRegisterInfo.cpp | 2311 const int *SIRegisterInfo::getRegUnitPressureSets(unsigned RegUnit) const { in getRegUnitPressureSets()
2314 if (RegPressureIgnoredUnits[RegUnit]) in getRegUnitPressureSets()
2317 return AMDGPUGenRegisterInfo::getRegUnitPressureSets(RegUnit); in getRegUnitPressureSets()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 753 MCRegUnitRootIterator(unsigned RegUnit, const MCRegisterInfo *MCRI) { in MCRegUnitRootIterator() argument
754 assert(RegUnit < MCRI->getNumRegUnits() && "Invalid register unit"); in MCRegUnitRootIterator()
755 Reg0 = MCRI->RegUnitRoots[RegUnit][0]; in MCRegUnitRootIterator()
756 Reg1 = MCRI->RegUnitRoots[RegUnit][1]; in MCRegUnitRootIterator()
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