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Searched refs:RegSet (Results 1 – 9 of 9) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiDelaySlotFiller.cpp69 bool isRegInSet(SmallSet<unsigned, 32> &RegSet, unsigned Reg);
255 bool Filler::isRegInSet(SmallSet<unsigned, 32> &RegSet, unsigned Reg) { in isRegInSet() argument
258 if (RegSet.count(*AI)) in isRegInSet()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DRegisterPressure.h274 using RegSet = SparseSet<IndexMaskPair>; variable
275 RegSet Regs;
297 RegSet::const_iterator I = Regs.find(SparseIndex); in contains()
320 RegSet::iterator I = Regs.find(SparseIndex); in erase()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DDelaySlotFiller.cpp75 bool IsRegInSet(SmallSet<unsigned, 32>& RegSet,
343 bool Filler::IsRegInSet(SmallSet<unsigned, 32>& RegSet, unsigned Reg) in IsRegInSet() argument
348 if (RegSet.count(*AI)) in IsRegInSet()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsDelaySlotFiller.cpp133 bool isRegInSet(const BitVector &RegSet, unsigned Reg) const;
447 bool RegDefsUses::isRegInSet(const BitVector &RegSet, unsigned Reg) const { in isRegInSet() argument
450 if (RegSet.test(*AI)) in isRegInSet()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/
H A DMCRegisterInfo.h37 const uint8_t *const RegSet; variable
74 return (RegSet[Byte] & (1 << InByte)) != 0; in contains()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DMachineVerifier.cpp107 using RegSet = DenseSet<Register>; typedef
116 RegSet regsLive;
140 RegSet regsKilled;
144 RegSet regsLiveOut;
148 RegSet vregsPassed;
152 RegSet vregsRequired;
170 bool addRequired(const RegSet &RS) { in addRequired()
H A DRegAllocPBQP.cpp149 using RegSet = std::set<Register>; typedef in __anon73672b9b0111::RegAllocPBQP
153 RegSet VRegsToAlloc, EmptyIntervalVRegs;
H A DAggressiveAntiDepBreaker.cpp260 SmallSet<unsigned, 4> RegSet; in AntiDepEdges() local
263 if (RegSet.insert(Pred.getReg()).second) in AntiDepEdges()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonExpandCondsets.cpp211 void updateLiveness(std::set<Register> &RegSet, bool Recalc,
552 void HexagonExpandCondsets::updateLiveness(std::set<Register> &RegSet, in updateLiveness() argument
556 for (Register R : RegSet) { in updateLiveness()