| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 104 unsigned &RegKind);
948 unsigned RegNo, RegKind; in parseOperand() local
949 if (!matchRegisterName(Parser.getTok(), RegNo, RegKind)) in parseOperand()
954 Operands.push_back(SparcOperand::CreateReg(RegNo, RegKind, S, E)); in parseOperand()
1007 unsigned RegKind; in parseSparcAsmOperand() local
1008 if (matchRegisterName(Parser.getTok(), RegNo, RegKind)) { in parseSparcAsmOperand()
1014 Op = SparcOperand::CreateReg(RegNo, RegKind, S, E); in parseSparcAsmOperand()
1102 unsigned &RegKind) { in matchRegisterName() argument
1105 RegKind = SparcOperand::rk_None; in matchRegisterName()
1112 RegKind = SparcOperand::rk_IntReg; in matchRegisterName()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/AsmParser/ |
| H A D | SystemZAsmParser.cpp | 118 unsigned RegKind : 4; member
184 createMem(MemoryKind MemKind, RegisterKind RegKind, unsigned Base, in createMem() argument
189 Op->Mem.RegKind = RegKind; in createMem()
222 bool isReg(RegisterKind RegKind) const { in isReg()
223 return Kind == KindReg && Reg.Kind == RegKind; in isReg()
263 bool isMem(MemoryKind MemKind, RegisterKind RegKind) const { in isMem()
264 return isMem(MemKind) && Mem.RegKind == RegKind; in isMem()
266 bool isMemDisp12(MemoryKind MemKind, RegisterKind RegKind) const { in isMemDisp12()
267 return isMem(MemKind, RegKind) && inRange(Mem.Disp, 0, 0xfff); in isMemDisp12()
269 bool isMemDisp20(MemoryKind MemKind, RegisterKind RegKind) const { in isMemDisp20()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 65 enum class RegKind { enum
83 StringMap<std::pair<RegKind, unsigned>> RegisterReqs;
157 unsigned matchRegisterNameAlias(StringRef Name, RegKind Kind);
231 RegKind MatchKind);
257 template <RegKind VectorKind>
349 RegKind Kind;
378 RegKind RegisterKind;
1077 return Kind == k_Register && Reg.Kind == RegKind::Scalar; in isScalarReg()
1081 return Kind == k_Register && Reg.Kind == RegKind::NeonVector; in isNeonVectorReg()
1085 return Kind == k_Register && Reg.Kind == RegKind::NeonVector && in isNeonVectorRegLo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1153 void usesRegister(RegisterKind RegKind, unsigned DwordRegIndex, unsigned RegWidth) { in usesRegister() argument
1154 switch (RegKind) { in usesRegister()
1232 RegisterKind RegKind, unsigned Reg1, SMLoc Loc);
1233 bool ParseAMDGPURegister(RegisterKind &RegKind, unsigned &Reg,
1236 bool ParseAMDGPURegister(RegisterKind &RegKind, unsigned &Reg,
1239 unsigned ParseRegularReg(RegisterKind &RegKind, unsigned &RegNum,
1242 unsigned ParseSpecialReg(RegisterKind &RegKind, unsigned &RegNum,
1245 unsigned ParseRegList(RegisterKind &RegKind, unsigned &RegNum,
1248 unsigned getRegularReg(RegisterKind RegKind,
1255 Optional<StringRef> getGprCountSymbolName(RegisterKind RegKind);
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRegPressure.h | 31 enum RegKind { enum
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.td | 531 = "isTypedVectorList<RegKind::NeonVector, " # count # ", " # lanes # ", " # eltsize # ">";
543 let PredicateMethod = "isImplicitlyTypedVectorList<RegKind::NeonVector, " # count # ">";
553 let PredicateMethod = "isImplicitlyTypedVectorList<RegKind::NeonVector, " # count # ">";
1005 let ParserMethod = "tryParseVectorList<RegKind::SVEDataVector>";
1007 "isTypedVectorList<RegKind::SVEDataVector, " #NumRegs #", 0, " #ElementWidth #">";
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 448 bool validateMSAIndex(int Val, int RegKind);
800 enum RegKind { enum in __anon5ed6d99d0211::MipsOperand
859 RegKind Kind; /// Bitfield of the kinds it could possibly be
889 RegKind RegKind, in CreateReg() argument
896 Op->RegIdx.Kind = RegKind; in CreateReg()
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