| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiDelaySlotFiller.cpp | 66 SmallSet<unsigned, 32> &RegDefs,
72 bool &SawStore, SmallSet<unsigned, 32> &RegDefs,
147 SmallSet<unsigned, 32> RegDefs; in findDelayInstr() local
150 insertDefsUses(Slot, RegDefs, RegUses); in findDelayInstr()
168 if (delayHasHazard(FI, SawLoad, SawStore, RegDefs, RegUses)) { in findDelayInstr()
169 insertDefsUses(FI, RegDefs, RegUses); in findDelayInstr()
179 bool &SawStore, SmallSet<unsigned, 32> &RegDefs, in delayHasHazard() argument
212 if (isRegInSet(RegDefs, Reg) || isRegInSet(RegUses, Reg)) in delayHasHazard()
217 if (isRegInSet(RegDefs, Reg)) in delayHasHazard()
226 SmallSet<unsigned, 32> &RegDefs, in insertDefsUses() argument
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 68 SmallSet<unsigned, 32>& RegDefs,
72 SmallSet<unsigned, 32>& RegDefs,
80 SmallSet<unsigned, 32> &RegDefs,
170 SmallSet<unsigned, 32> RegDefs; in findDelayInstr() local
195 insertCallDefsUses(slot, RegDefs, RegUses); in findDelayInstr()
197 insertDefsUses(slot, RegDefs, RegUses); in findDelayInstr()
217 if (delayHasHazard(I, sawLoad, sawStore, RegDefs, RegUses)) { in findDelayInstr()
218 insertDefsUses(I, RegDefs, RegUses); in findDelayInstr()
230 SmallSet<unsigned, 32> &RegDefs, in delayHasHazard() argument
260 if (IsRegInSet(RegDefs, Reg) || IsRegInSet(RegUses, Reg)) in delayHasHazard()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHazardRecognizer.cpp | 35 RegDefs.clear(); in Reset()
51 if (!MO.isReg() || RegDefs.count(MO.getReg()) == 0) in getHazardType()
87 RegDefs.clear(); in AdvanceCycle()
117 RegDefs.insert(MO.getReg()); in EmitInstruction()
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| H A D | HexagonHazardRecognizer.h | 41 SmallSet<unsigned, 8> RegDefs; variable
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachineDebugify.cpp | 121 SmallVector<MachineOperand *, 4> RegDefs; in applyDebugifyMetadataToMachineFunction() local
124 RegDefs.push_back(&MO); in applyDebugifyMetadataToMachineFunction()
125 for (MachineOperand *MO : RegDefs) in applyDebugifyMetadataToMachineFunction()
130 if (RegDefs.empty()) { in applyDebugifyMetadataToMachineFunction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/MCA/Stages/ |
| H A D | DispatchStage.cpp | 47 SmallVector<MCPhysReg, 4> RegDefs; in checkPRF() local
49 RegDefs.emplace_back(RegDef.getRegisterID()); in checkPRF()
51 const unsigned RegisterMask = PRF.isAvailable(RegDefs); in checkPRF()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SILoadStoreOptimizer.cpp | 593 DenseSet<Register> &RegDefs, in addDefsUsesToList() argument
598 RegDefs.insert(Op.getReg()); in addDefsUsesToList()
616 static bool addToListsIfDependent(MachineInstr &MI, DenseSet<Register> &RegDefs, in addToListsIfDependent() argument
628 if (Use.isReg() && ((Use.readsReg() && RegDefs.count(Use.getReg())) || in addToListsIfDependent()
629 (Use.isDef() && RegDefs.count(Use.getReg())) || in addToListsIfDependent()
633 addDefsUsesToList(MI, RegDefs, PhysRegUses); in addToListsIfDependent()
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