Home
last modified time | relevance | path

Searched refs:RegClassUnitSets (Results 1 – 2 of 2) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DCodeGenRegisters.h572 std::vector<std::vector<unsigned>> RegClassUnitSets; variable
771 return RegClassUnitSets.size(); in getNumRegClassPressureSetLists()
779 return RegClassUnitSets[RCIdx]; in getRCPressureSetIDs()
H A DCodeGenRegisters.cpp1836 assert(RegClassUnitSets.empty() && "this invalidates RegClassUnitSets"); in pruneUnitSets()
1989 RegClassUnitSets.resize(RegClasses.size()); in computeRegUnitSets()
2014 RegClassUnitSets[RCIdx].push_back(USIdx); in computeRegUnitSets()
2018 assert(!RegClassUnitSets[RCIdx].empty() && "missing unit set for regclass"); in computeRegUnitSets()
2035 for (unsigned e = RegClassUnitSets.size(); in computeRegUnitSets()
2037 if (RegClassUnitSets[RCUnitSetsIdx] == RUSets) { in computeRegUnitSets()
2042 if (RCUnitSetsIdx == RegClassUnitSets.size()) { in computeRegUnitSets()
2044 RegClassUnitSets.resize(RCUnitSetsIdx + 1); in computeRegUnitSets()
2045 RegClassUnitSets[RCUnitSetsIdx].swap(RUSets); in computeRegUnitSets()