Searched refs:RegBytes (Results 1 – 4 of 4) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86SpeculativeLoadHardening.cpp | 1869 int RegBytes = TRI->getRegSizeInBits(*RC) / 8; in canHardenRegister() local
1870 if (RegBytes > 8) in canHardenRegister()
1874 unsigned RegIdx = Log2_32(RegBytes); in canHardenRegister()
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| H A D | X86InstrInfo.h | 44 unsigned getCMovOpcode(unsigned RegBytes, bool HasMemoryOperand = false);
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| H A D | X86InstrInfo.cpp | 2791 unsigned X86::getCMovOpcode(unsigned RegBytes, bool HasMemoryOperand) { in getCMovOpcode() argument
2792 switch(RegBytes) { in getCMovOpcode()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 7495 unsigned RegBytes = RegVT.getSizeInBits() / 8; in expandUnalignedLoad() local
7496 unsigned NumRegs = (LoadedBytes + RegBytes - 1) / RegBytes; in expandUnalignedLoad()
7508 SDValue PtrIncrement = DAG.getConstant(RegBytes, dl, PtrVT); in expandUnalignedLoad()
7509 SDValue StackPtrIncrement = DAG.getConstant(RegBytes, dl, StackPtrVT); in expandUnalignedLoad()
7523 Offset += RegBytes; in expandUnalignedLoad()
7648 unsigned RegBytes = RegVT.getSizeInBits() / 8; in expandUnalignedStore() local
7649 unsigned NumRegs = (StoredBytes + RegBytes - 1) / RegBytes; in expandUnalignedStore()
7662 SDValue PtrIncrement = DAG.getConstant(RegBytes, dl, PtrVT); in expandUnalignedStore()
7663 SDValue StackPtrIncrement = DAG.getConstant(RegBytes, dl, StackPtrVT); in expandUnalignedStore()
7679 Offset += RegBytes; in expandUnalignedStore()
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