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Searched refs:RegA (Results 1 – 7 of 7) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTwoAddressInstructionPass.cpp125 bool isProfitableToCommute(Register RegA, Register RegB, Register RegC,
131 bool isProfitableToConv3Addr(Register RegA, Register RegB);
134 MachineBasicBlock::iterator &nmi, Register RegA,
416 static bool regsAreCompatible(Register RegA, Register RegB, in regsAreCompatible() argument
418 if (RegA == RegB) in regsAreCompatible()
420 if (!RegA || !RegB) in regsAreCompatible()
422 return TRI->regsOverlap(RegA, RegB); in regsAreCompatible()
437 bool TwoAddressInstructionPass::isProfitableToCommute(Register RegA, in isProfitableToCommute() argument
476 MCRegister ToRegA = getMappedReg(RegA, DstRegMap); in isProfitableToCommute()
524 if (isRevCopyChain(RegC, RegA, MaxDataFlowEdge)) in isProfitableToCommute()
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H A DImplicitNullChecks.cpp288 Register RegA = MOA.getReg(); in canReorder() local
295 if (TRI->regsOverlap(RegA, RegB) && (MOA.isDef() || MOB.isDef())) in canReorder()
H A DTargetInstrInfo.cpp844 Register RegA = OpA.getReg(); in reassociateOps() local
850 if (Register::isVirtualRegister(RegA)) in reassociateOps()
851 MRI.constrainRegClass(RegA, RC); in reassociateOps()
879 .addReg(RegA, getKillRegState(KillA)) in reassociateOps()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/
H A DMCRegisterInfo.h560 bool isSubRegister(MCRegister RegA, MCRegister RegB) const { in isSubRegister() argument
561 return isSuperRegister(RegB, RegA); in isSubRegister()
565 bool isSuperRegister(MCRegister RegA, MCRegister RegB) const;
568 bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSubRegisterEq() argument
569 return isSuperRegisterEq(RegB, RegA); in isSubRegisterEq()
574 bool isSuperRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperRegisterEq() argument
575 return RegA == RegB || isSuperRegister(RegA, RegB); in isSuperRegisterEq()
580 bool isSuperOrSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperOrSubRegisterEq() argument
581 return isSubRegisterEq(RegA, RegB) || isSuperRegister(RegA, RegB); in isSuperOrSubRegisterEq()
656 inline bool MCRegisterInfo::isSuperRegister(MCRegister RegA, MCRegister RegB) const{ in isSuperRegister() argument
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86WinAllocaExpander.cpp220 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower() local
222 .addReg(RegA, RegState::Undef); in lower()
234 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower() local
236 .addReg(RegA, RegState::Undef); in lower()
248 unsigned RegA = Is64BitAlloca ? X86::RAX : X86::EAX; in lower() local
249 BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::COPY), RegA) in lower()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp2130 for (auto &RegA : DefsA) in isDependent() local
2133 if (RegA == RegB) in isDependent()
2136 if (Register::isPhysicalRegister(RegA)) in isDependent()
2137 for (MCSubRegIterator SubRegs(RegA, &HRI); SubRegs.isValid(); ++SubRegs) in isDependent()
2143 if (RegA == *SubRegs) in isDependent()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp527 Register RegA = Prev->getOperand(AddOpIdx).getReg(); in getFMAPatterns() local
528 MachineInstr *Leaf = MRI->getUniqueVRegDef(RegA); in getFMAPatterns()