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Searched refs:RecVec (Results 1 – 11 of 11) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DCodeGenSchedule.cpp241 const RecVec Decls = Records.getAllDerivedDefinitions("STIPredicateDecl"); in checkSTIPredicates()
255 const RecVec Defs = in checkSTIPredicates()
258 RecVec Opcodes = R->getValueAsListOfDefs("Opcodes"); in checkSTIPredicates()
299 RecVec Classes = Def->getValueAsListOfDefs("Classes"); in processSTIPredicate()
305 RecVec Opcodes = EC->getValueAsListOfDefs("Opcodes"); in processSTIPredicate()
330 RecVec Classes = Def->getValueAsListOfDefs("Classes"); in processSTIPredicate()
337 RecVec Opcodes = EC->getValueAsListOfDefs("Opcodes"); in processSTIPredicate()
404 RecVec RV = Records.getAllDerivedDefinitions("STIPredicate"); in collectSTIPredicates()
440 RecVec MCPredicates = Records.getAllDerivedDefinitions("TIIPredicate"); in checkMCInstPredicates()
462 RecVec Units = Records.getAllDerivedDefinitions("RetireControlUnit"); in collectRetireControlUnits()
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H A DCodeGenSchedule.h33 using RecVec = std::vector<Record*>; variable
56 RecVec Aliases;
100 RecVec PredTerm;
143 RecVec InstRWs;
229 RecVec ItinDefList;
233 RecVec ItinRWDefs;
237 RecVec UnsupportedFeaturesDefs;
240 RecVec WriteResDefs;
241 RecVec ReadAdvanceDefs;
244 RecVec ProcResourceDefs;
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H A DPredicateExpander.h55 using RecVec = std::vector<Record *>; variable
72 void expandCheckPseudo(raw_ostream &OS, const RecVec &Opcodes);
73 void expandCheckOpcode(raw_ostream &OS, const RecVec &Opcodes);
74 void expandPredicateSequence(raw_ostream &OS, const RecVec &Sequence,
89 void expandOpcodeSwitchStatement(raw_ostream &OS, const RecVec &Cases,
H A DSubtargetEmitter.cpp111 void ExpandProcResources(RecVec &PRVec, std::vector<int64_t> &Cycles,
179 static void printFeatureMask(raw_ostream &OS, RecVec &FeatureList, in printFeatureMask()
232 RecVec ImpliesList = Feature->getValueAsListOfDefs("Implies"); in FeatureKeyValues()
266 RecVec FeatureList = Processor->getValueAsListOfDefs("Features"); in CPUKeyValues()
267 RecVec TuneFeatureList = Processor->getValueAsListOfDefs("TuneFeatures"); in CPUKeyValues()
299 RecVec StageList = ItinData->getValueAsListOfDefs("Stages"); in FormItineraryStageString()
312 RecVec UnitList = Stage->getValueAsListOfDefs("Units"); in FormItineraryStageString()
358 RecVec BypassList = ItinData->getValueAsListOfDefs("Bypasses"); in FormItineraryBypassString()
390 RecVec FUs = ProcModel.ItinsDef->getValueAsListOfDefs("FU"); in EmitStageAndOperandCycleData()
404 RecVec BPs = ProcModel.ItinsDef->getValueAsListOfDefs("BP"); in EmitStageAndOperandCycleData()
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H A DPredicateExpander.cpp118 const RecVec &Opcodes) { in expandCheckOpcode()
148 const RecVec &Opcodes) { in expandCheckPseudo()
156 const RecVec &Sequence, in expandPredicateSequence()
242 const RecVec &Opcodes = Rec->getValueAsListOfDefs("Opcodes"); in expandOpcodeSwitchCase()
256 const RecVec &Cases, in expandOpcodeSwitchStatement()
424 RecVec Delegates = Fn.getDeclaration()->getValueAsListOfDefs("Delegates"); in expandPrologue()
H A DDFAPacketizerEmitter.cpp84 void createScheduleClasses(unsigned ItineraryIdx, const RecVec &Itineraries);
193 const RecVec &Itineraries) { in createScheduleClasses()
H A DInstrInfoEmitter.cpp632 RecVec TIIPredicates = Records.getAllDerivedDefinitions("TIIPredicate"); in emitMCIIHelperMethods()
681 RecVec TIIPredicates = Records.getAllDerivedDefinitions("TIIPredicate"); in emitTIIHelperMethods()
H A DRegisterInfoEmitter.cpp1579 const SetTheory::RecVec *Regs = RegBank.getSets().expand(CSRSet); in runTargetDesc()
H A DCodeGenRegisters.cpp752 const SetTheory::RecVec *Elements = RegBank.getSets().expand(R); in CodeGenRegisterClass()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/TableGen/
H A DSetTheory.h66 using RecVec = std::vector<Record *>;
97 using ExpandMap = std::map<Record *, RecVec>;
139 const RecVec *expand(Record *Set);
/netbsd-src/external/apache2/llvm/dist/llvm/lib/TableGen/
H A DSetTheory.cpp36 using RecVec = SetTheory::RecVec; typedef
230 if (const RecVec *Result = ST.expand(Rec)) in apply()
285 if (const RecVec *Result = expand(Def->getDef())) in evaluate()
308 const RecVec *SetTheory::expand(Record *Set) { in expand()
323 RecVec &EltVec = Expansions[Set]; in expand()