Searched refs:RHSL (Results 1 – 3 of 3) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 2526 SDValue LHSL, LHSH, RHSL, RHSH; in ExpandIntRes_MINMAX() local
2528 GetExpandedInteger(N->getOperand(1), RHSL, RHSH); in ExpandIntRes_MINMAX()
2543 SDValue LoCmp = DAG.getSelect(DL, NVT, IsHiLeft, LHSL, RHSL); in ExpandIntRes_MINMAX()
2546 SDValue LoMinMax = DAG.getNode(LoOpc, DL, NVT, {LHSL, RHSL}); in ExpandIntRes_MINMAX()
2555 SDValue LHSL, LHSH, RHSL, RHSH; in ExpandIntRes_ADDSUB() local
2557 GetExpandedInteger(N->getOperand(1), RHSL, RHSH); in ExpandIntRes_ADDSUB()
2560 SDValue LoOps[2] = { LHSL, RHSL }; in ExpandIntRes_ADDSUB()
2681 SDValue LHSL, LHSH, RHSL, RHSH; in ExpandIntRes_ADDSUBC() local
2684 GetExpandedInteger(N->getOperand(1), RHSL, RHSH); in ExpandIntRes_ADDSUBC()
2686 SDValue LoOps[2] = { LHSL, RHSL }; in ExpandIntRes_ADDSUBC()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 711 SDValue RHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ExpandADDSUB() local
723 LHSL, RHSL, Zero); in ExpandADDSUB()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 1076 Register RHSL = MRI.createGenericVirtualRegister(NarrowTy); in narrowScalar() local
1078 MIRBuilder.buildUnmerge({RHSL, RHSH}, MI.getOperand(3)); in narrowScalar()
1085 MachineInstrBuilder XorL = MIRBuilder.buildXor(NarrowTy, LHSL, RHSL); in narrowScalar()
1095 ICmpInst::getUnsignedPredicate(Pred), ResTy, LHSL, RHSL); in narrowScalar()
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