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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.cpp43 MSP430::R8, MSP430::R9, MSP430::R10, in getCalleeSavedRegs()
48 MSP430::R8, MSP430::R9, MSP430::R10, in getCalleeSavedRegs()
53 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs()
59 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs()
H A DMSP430RegisterInfo.td64 def R9 : MSP430RegWithSubregs<9, "r9", [R9B]>;
83 (add R12, R13, R14, R15, R11, R10, R9, R8, R7, R6, R5,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.td34 def R9 : Ri< 9, "r9">, DwarfRegNum<[9]>;
48 R4, R5, R6, R7, R8, R9, R10,
55 R4, R5, R6, R7, R8, R9, R10,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.cpp38 PPC::R7, PPC::R8, PPC::R9, PPC::R10, in CC_PPC32_SVR4_Custom_AlignArgRegs()
63 PPC::R7, PPC::R8, PPC::R9, PPC::R10, in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
114 static const MCPhysReg HiRegList[] = { PPC::R3, PPC::R5, PPC::R7, PPC::R9 }; in CC_PPC32_SPE_CustomSplitFP64()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMCallingConv.td122 CCIfType<[i32], CCAssignToReg<[R4, R5, R6, R7, R8, R9, R10, R11]>>
270 def CSR_AAPCS : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, R6, R5, R4,
275 def CSR_Win_AAPCS_CFGuard_Check : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7,
286 R11, R10, R9, R8,
297 def CSR_AAPCS_ThisReturn : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, R6,
301 // iOS ABI deviates from ARM standard ABI. R9 is not a callee-saved register.
303 def CSR_iOS : CalleeSavedRegs<(add LR, R7, R6, R5, R4, (sub CSR_AAPCS, R9))>;
309 (sub CSR_AAPCS_ThisReturn, R9))>;
312 : CalleeSavedRegs<(add LR, SP, (sub(sequence "R%u", 12, 1), R9, R12),
H A DARMBaseRegisterInfo.h54 case R8: case R9: case R10: case R11: case R12: in isARMArea1Register()
66 case R8: case R9: case R10: case R11: case R12: in isARMArea2Register()
/netbsd-src/external/bsd/pcc/dist/pcc/arch/arm/
H A Dmacdefs.h125 #define R9 9 macro
198 { R8, R9, R7R8, R9R10, -1 }, \
199 { R9, R10, R8R9, -1 }, \
/netbsd-src/external/bsd/pcc/dist/pcc/arch/vax/
H A Dmacdefs.h135 # define R9 9 macro
224 { R8, R9, XR7, XR9, -1 }, \
225 { R9, R10, XR8, XR10, -1 }, \
/netbsd-src/external/gpl3/gcc/dist/libphobos/libdruntime/core/internal/
H A Datomic.d21 AX, BX, CX, DX, DI, SI, R8, R9 in version() enumerator
96 ?1 mov R9, %1; in version()
102 ?1 mov [R9], RAX; in version()
103 ?1 mov 8[R9], RDX; in version()
434 mov R9, RDX; in version() local
445 mov [R9], RAX; in version()
446 mov 8[R9], RDX; in version()
458 mov R9, RDX; in version() local
469 mov [R9], RAX; in version()
470 mov 8[R9], RDX; in version()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
H A DAVRRegisterInfo.td53 def R9 : AVRReg<9, "r9">, DwarfRegNum<[9]>;
101 def R9R8 : AVRReg<8, "r9:r8", [R8, R9]>, DwarfRegNum<[8]>;
116 def R10R9 : AVRReg<9, "r10:r9", [R9, R10]>, DwarfRegNum<[9]>;
132 R9, R8, R7, R6, R5, R4, R3, R2, R0, R1
138 add R15, R14, R13, R12, R11, R10, R9, R8, R7, R6, R5, R4, R3, R2, R0, R1
/netbsd-src/external/bsd/pcc/dist/pcc/arch/powerpc/
H A Dmacdefs.h156 #define R9 9 /* scratch register / argument 6 */ macro
321 { R7, R8, R6R7, R8R9, -1 }, { R8, R9, R7R8, R8R9, -1 }, \
322 { R9, R10, R8R9, -1 }, \
/netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/rl78/
H A Dsignbit.S43 ;; result is in R8..R9
57 ;; result is in R8..R9
/netbsd-src/external/gpl3/gcc/dist/libgcc/config/rl78/
H A Dsignbit.S43 ;; result is in R8..R9
57 ;; result is in R8..R9
/netbsd-src/external/gpl3/gcc/dist/libgcc/config/msp430/
H A Dlib2hw_mul.S214 ;* - Operand 1 is in R8, R9, R10, R11
220 ;* R12:R15 = (R8:R9 * R12:R13) + ((R8:R9 * R14:R15) << 32) + ((R10:R11 * R12:R13) << 32)
228 ;* Registers used: R6, R7, R8, R9, R10, R11, R12, R13, R14, R15
237 PUSH R10 { PUSH R9 { PUSH R8 { PUSH R7 { PUSH R6
241 MOV.W R9, &\MPY32_HI
257 MOV.W R9, &\MPY32_HI
274 POP R6 { POP R7 { POP R8 { POP R9 { POP R10
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
H A DARCRegisterInfo.td38 def R9 : Core< 9, "%r9">, DwarfRegNum<[9]>;
72 R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19,
/netbsd-src/sys/external/bsd/gnu-efi/dist/inc/arm/
H A Defisetjmp_arch.h15 UINT32 R9; member
/netbsd-src/external/bsd/pcc/dist/pcc/arch/hppa/
H A Dmacdefs.h126 #define R9 9 macro
362 { R9, R8, -1 }, \
363 { R10, R9, -1 }, \
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFFrameLowering.cpp38 SavedRegs.reset(BPF::R9); in determineCalleeSaves()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.cpp163 {codeview::RegisterId::R9, X86::R9}, in initLLVMToSEHAndCVRegMapping()
657 case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9: in getX86SubSuperRegisterOrZero()
694 case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9: in getX86SubSuperRegisterOrZero()
730 case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9: in getX86SubSuperRegisterOrZero()
766 case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9: in getX86SubSuperRegisterOrZero()
767 return X86::R9; in getX86SubSuperRegisterOrZero()
/netbsd-src/crypto/external/bsd/openssl/dist/test/certs/
H A Dbadcn1-key.pem2 MIIEvwIBADANBgkqhkiG9w0BAQEFAASCBKkwggSlAgEAAoIBAQDN9WI6OyxnW+R9
/netbsd-src/crypto/external/bsd/openssl.old/dist/test/certs/
H A Dbadcn1-key.pem2 MIIEvwIBADANBgkqhkiG9w0BAQEFAASCBKkwggSlAgEAAoIBAQDN9WI6OyxnW+R9
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86CallingConv.td64 let GPR_64 = [RAX, RCX, RDX, RDI, RSI, R8, R9, R10, R11, R12, R14, R15];
71 let GPR_64 = [RAX, RCX, RDX, RDI, RSI, R8, R9, R12, R13, R14, R15];
427 CCIfType<[i64], CCAssignToReg<[RBX, RBP, RDI, RSI, RDX, RCX, R8, R9,
536 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
598 RDI, RSI, RDX, RCX, R8, R9,
656 [RCX , RDX , R8 , R9 ]>>,
669 CCIfSRet<CCIfType<[i64], CCAssignToRegWithShadow<[RDX , R8 , R9 ],
672 CCIfType<[i64], CCAssignToRegWithShadow<[RCX , RDX , R8 , R9 ],
694 CCAssignToReg<[R13, RBP, R12, RBX, R14, RSI, RDI, R8, R9, R15]>>,
1002 CCIfType<[i64], CCIfSubtarget<"isTargetWin64()", CCAssignToReg<[RCX, RDX, R8, R9 ]>>>,
[all …]
/netbsd-src/sys/external/bsd/gnu-efi/dist/inc/
H A Defidebug.h284 UINT64 R9; member
337 UINT64 R9; member
498 UINT32 R9; member
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiBaseInfo.h64 case Lanai::R9: in getLanaiRegisterNumbering()
/netbsd-src/sys/arch/amd64/include/
H A Dframe_regs.h37 greg(r9, R9, 5) /* tf_r9 */ \

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