| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRRegisterInfo.td | 72 def R28 : AVRReg<28, "r28", [], ["yl"]>, DwarfRegNum<[28]>; 90 def R29R28 : AVRReg<28, "r29:r28", [R28, R29], ["Y"]>, DwarfRegNum<[28]>; 131 R28, R29, R17, R16, R15, R14, R13, R12, R11, R10, 149 R28, R29, R17, R16
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| H A D | AVRRegisterInfo.cpp | 78 Reserved.set(AVR::R28); in getReservedRegs() 256 return AVR::R28; in getFrameRegister()
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| H A D | AVRCallingConv.td | 40 def CSR_Normal : CalleeSavedRegs<(add R29, R28, (sequence "R%u", 17, 2))>;
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| H A D | AVRFrameLowering.cpp | 410 SavedRegs.set(AVR::R28); in determineCalleeSaves()
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| H A D | AVRISelLowering.cpp | 2086 .Case("r27", AVR::R27).Case("r28", AVR::R28).Case("r29", AVR::R29) in getRegisterByName()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPseudo.td | 234 isCodeGenOnly = 1, Defs = [PC], Uses = [R28], isPredicable = 0 in 359 let Defs = [R14, R15, R28, R29, R30, R31, PC] in { 374 let Defs = [R14, R15, R28, R29, R30, R31, PC] in { 395 let Defs = [R14, R15, R28] in 398 let Defs = [R14, R15, R28], isExtended = 1, opExtendable = 0 in 401 let Defs = [R14, R15, R28, P0] in 404 let Defs = [R14, R15, R28, P0], isExtended = 1, opExtendable = 0 in
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| H A D | HexagonRegisterInfo.td | 126 def D14 : Rd<28, "r29:28", [R28, R29]>, DwarfRegNum<[60]>;
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| H A D | HexagonISelLowering.cpp | 297 .Case("r28", Hexagon::R28) in getRegisterByName() 3101 unsigned OffsetReg = Hexagon::R28; in LowerEH_RETURN()
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| H A D | HexagonFrameLowering.cpp | 800 .addReg(Hexagon::R28); in insertEpilogueInBlock()
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| /netbsd-src/external/bsd/pcc/dist/pcc/arch/powerpc/ |
| H A D | macdefs.h | 175 #define R28 28 macro 326 { R26, R27, -1 }, { R28, R29, -1 }, \
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiBaseInfo.h | 105 case Lanai::R28: in getLanaiRegisterNumbering()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/ |
| H A D | CSKYRegisterInfo.td | 80 def R28 : CSKYReg<28, "r28", ["rgb"]>, DwarfRegNum<[28]>; 151 (sequence "R%u", 16, 17), (sequence "R%u", 26, 27), R28,
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| H A D | CSKYInstrFormats.td | 242 // Format< OP[6] | SOP[5] | PCODE[5] | 0000[4] | 000 | R28 | LIST2[3] | R15 |
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| /netbsd-src/external/gpl3/gcc/dist/libgcc/config/avr/libf7/ |
| H A D | asm-defs.h | 123 R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, \
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| /netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/avr/libf7/ |
| H A D | asm-defs.h | 123 R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, \
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 160 Lanai::R24, Lanai::R25, Lanai::R26, Lanai::R27, Lanai::R28, Lanai::R29,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/Disassembler/ |
| H A D | AVRDisassembler.cpp | 68 AVR::R28, AVR::R29, AVR::R30, AVR::R31,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCCallingConv.td | 273 R28, R29, R30, R31, CR2, CR3, CR4 288 R21, R22, R23, R24, R25, R26, R27, R28,
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| H A D | PPCFrameLowering.cpp | 122 {PPC::R28, -16}, \ in getCalleeSavedSpillSlots()
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| /netbsd-src/sys/external/bsd/gnu-efi/dist/inc/ |
| H A D | efidebug.h | 356 UINT64 R28; member
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| /netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/ti/ |
| H A D | k3-j721e-common-proc-board.dts | 131 J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 553 Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29, in DecodeIntRegsRegisterClass()
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| /netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/avr/ |
| H A D | lib1funcs.S | 1274 ;; Save 10 Registers: R10..R17, R28, R29
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| /netbsd-src/external/gpl3/gcc/dist/libgcc/config/avr/ |
| H A D | lib1funcs.S | 1274 ;; Save 10 Registers: R10..R17, R28, R29
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/avr/ |
| H A D | avr.md | 326 ;; virtual_stack_vars = hard_frame_pointer + 1 so the RTL become R28=R28
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