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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
H A DAVRRegisterInfo.td66 def R22 : AVRReg<22, "r22">, DwarfRegNum<[22]>;
94 def R23R22 : AVRReg<22, "r23:r22", [R22, R23]>, DwarfRegNum<[22]>;
110 def R22R21 : AVRReg<21, "r22:r21", [R21, R22]>, DwarfRegNum<[21]>;
127 add R24, R25, R18, R19, R20, R21, R22, R23,
145 add R24, R25, R18, R19, R20, R21, R22, R23,
155 add R23, R22, R21, R20, R19, R18, R17, R16
H A DAVRISelLowering.cpp992 AVR::R25, AVR::R24, AVR::R23, AVR::R22, AVR::R21, AVR::R20,
2084 .Case("r21", AVR::R21).Case("r22", AVR::R22).Case("r23", AVR::R23) in getRegisterByName()
/netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/avr/
H A Dlib1funcs.S257 ;;; R25:R24 = (unsigned int) R22 * (unsigned int) R24
268 ;;; R25:R24 = (signed int) R22 * (signed int) R24
302 ;;; R25:R24 = R23:R22 * R25:R24
521 ;;; R25:R22 = (signed long) R27:R26 * (signed long) R19:R18
537 ;;; R25:R22 = (signed long) R27:R26 * (unsigned long) R19:R18
556 ;;; R25:R22 = (unsigned long) R27:R26 * (unsigned long) R19:R18
590 ;;; R25:R22 = (signed long) R27:R26 * R21:R18
605 ;;; R25:R22 = (one-extended long) R27:R26 * R21:R18
618 ;;; R25:R22 = (unsigned long) R27:R26 * R21:R18
640 ;;; R25:R22 = R25:R22 * R21:R18
[all …]
/netbsd-src/external/gpl3/gcc/dist/libgcc/config/avr/
H A Dlib1funcs.S257 ;;; R25:R24 = (unsigned int) R22 * (unsigned int) R24
268 ;;; R25:R24 = (signed int) R22 * (signed int) R24
302 ;;; R25:R24 = R23:R22 * R25:R24
521 ;;; R25:R22 = (signed long) R27:R26 * (signed long) R19:R18
537 ;;; R25:R22 = (signed long) R27:R26 * (unsigned long) R19:R18
556 ;;; R25:R22 = (unsigned long) R27:R26 * (unsigned long) R19:R18
590 ;;; R25:R22 = (signed long) R27:R26 * R21:R18
605 ;;; R25:R22 = (one-extended long) R27:R26 * R21:R18
618 ;;; R25:R22 = (unsigned long) R27:R26 * R21:R18
640 ;;; R25:R22 = R25:R22 * R21:R18
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
H A DARCRegisterInfo.td54 def R22 : Core<22, "%r22">, DwarfRegNum<[22]>;
73 R20, R21, R22, R23, R24, R25, GP, FP, SP, ILINK, R30, BLINK)>;
/netbsd-src/external/bsd/pcc/dist/pcc/arch/powerpc/
H A Dmacdefs.h169 #define R22 22 macro
325 { R22, R23, -1 }, { R24, R25, -1 }, \
/netbsd-src/sys/external/isc/libsodium/dist/src/libsodium/crypto_onetimeauth/poly1305/sse2/
H A Dpoly1305_sse2.c211 xmmi R20, R21, R22, R23, R24, S21, S22, S23, S24; in poly1305_blocks() local
269 R22 = _mm_shuffle_epi32(T5, _MM_SHUFFLE(1, 1, 0, 0)); in poly1305_blocks()
277 R22 = _mm_shuffle_epi32(T0, _MM_SHUFFLE(2, 2, 2, 2)); in poly1305_blocks()
282 S22 = _mm_mul_epu32(R22, FIVE); in poly1305_blocks()
473 T14 = R22; in poly1305_blocks()
595 T14 = R22; in poly1305_blocks()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiBaseInfo.h93 case Lanai::R22: in getLanaiRegisterNumbering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp122 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in getCalleeSavedRegs()
131 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in getCalleeSavedRegs()
H A DHexagonFrameLowering.h96 { Hexagon::R23, -28 }, { Hexagon::R22, -32 }, { Hexagon::D11, -32 }, in getCalleeSavedSpillSlots()
H A DHexagonRegisterInfo.td123 def D11 : Rd<22, "r23:22", [R22, R23]>, DwarfRegNum<[54]>;
378 (add R23, R22, R21, R20, R19, R18, R17, R16,
448 : CalleeSavedRegs<(add R16, R17, R18, R19, R20, R21, R22, R23,
/netbsd-src/external/gpl3/gcc/dist/libgcc/config/avr/libf7/
H A Dasm-defs.h123 R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, \
H A Dlibf7-asm.sx724 ;; Compute *R24 = *R22 + *R20 >> R18[7..1].
1193 #define Q0 C3 /* = R22 */
1197 ;; Clobbers: R22, R23, TMP.
1528 ;; call_dx: Copy the 4-byte input scalar from R22[4] to R20[4].
/netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/avr/libf7/
H A Dasm-defs.h123 R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, \
H A Dlibf7-asm.sx724 ;; Compute *R24 = *R22 + *R20 >> R18[7..1].
1193 #define Q0 C3 /* = R22 */
1197 ;; Clobbers: R22, R23, TMP.
1528 ;; call_dx: Copy the 4-byte input scalar from R22[4] to R20[4].
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp159 Lanai::R18, Lanai::R19, Lanai::R20, Lanai::R21, Lanai::R22, Lanai::R23,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp66 AVR::R20, AVR::R21, AVR::R22, AVR::R23,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.td272 R21, R22, R23, R24, R25, R26, R27,
288 R21, R22, R23, R24, R25, R26, R27, R28,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/Disassembler/
H A DARCDisassembler.cpp117 ARC::R21, ARC::R22, ARC::R23, ARC::R24, ARC::R25, ARC::GP, ARC::FP,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp552 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, Hexagon::R24, in DecodeIntRegsRegisterClass()
567 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in DecodeGeneralSubRegsRegisterClass()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/
H A DCSKYRegisterInfo.td74 def R22 : CSKYReg<22, "r22", ["t6"]>, DwarfRegNum<[22]>;
/netbsd-src/sys/external/bsd/gnu-efi/dist/inc/
H A Defidebug.h350 UINT64 R22; member
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCChecker.cpp687 Register = Hexagon::R22; in compoundRegisterMap()
H A DHexagonMCDuplexInfo.cpp686 case Hexagon::R22: in addOps()
H A DHexagonMCInstrInfo.cpp296 case R22: in getDuplexRegisterNumbering()

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