Searched refs:PromotedType (Results 1 – 3 of 3) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 787 EVT PromotedType = Op1Promoted.getValueType(); in PromoteIntRes_ADDSUBSHLSAT() local
788 unsigned NewBits = PromotedType.getScalarSizeInBits(); in PromoteIntRes_ADDSUBSHLSAT()
792 SDValue SatMax = DAG.getConstant(MaxVal, dl, PromotedType); in PromoteIntRes_ADDSUBSHLSAT()
794 DAG.getNode(ISD::ADD, dl, PromotedType, Op1Promoted, Op2Promoted); in PromoteIntRes_ADDSUBSHLSAT()
795 return DAG.getNode(ISD::UMIN, dl, PromotedType, Add, SatMax); in PromoteIntRes_ADDSUBSHLSAT()
800 return DAG.getNode(ISD::USUBSAT, dl, PromotedType, Op1Promoted, in PromoteIntRes_ADDSUBSHLSAT()
805 if (IsShift || TLI.isOperationLegalOrCustom(Opcode, PromotedType)) { in PromoteIntRes_ADDSUBSHLSAT()
822 EVT SHVT = TLI.getShiftAmountTy(PromotedType, DAG.getDataLayout()); in PromoteIntRes_ADDSUBSHLSAT()
825 DAG.getNode(ISD::SHL, dl, PromotedType, Op1Promoted, ShiftAmount); in PromoteIntRes_ADDSUBSHLSAT()
828 DAG.getNode(ISD::SHL, dl, PromotedType, Op2Promoted, ShiftAmount); in PromoteIntRes_ADDSUBSHLSAT()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 7105 Type *PromotedType = getTransitionType(); in isProfitableToPromote() local
7122 TTI.getVectorInstrCost(Transition->getOpcode(), PromotedType, Index); in isProfitableToPromote()
7142 VectorCost += TTI.getArithmeticInstrCost(Inst->getOpcode(), PromotedType, in isProfitableToPromote()
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/Sema/ |
| H A D | SemaDecl.cpp | 3059 QualType PromotedType; member
3777 << Warnings[Warn].PromotedType in MergeFunctionDecl()
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