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Searched refs:Promote (Results 1 – 25 of 105) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiCallingConv.td19 // Promote i8/i16 args to i32
32 // Promote i8/i16 args to i32
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86CallingConv.td81 // Promote i1/i8/i16/v1i1 arguments to i32.
84 // Promote v8i1/v16i1/v32i1 arguments to i32.
155 // Promote i1, v1i1, v8i1 arguments to i8.
158 // Promote v16i1 arguments to i16.
161 // Promote v32i1 arguments to i32.
312 // Promote all types to i32
372 // Promote all types to i64
381 // Promote all types to i64
423 // Promote all types to i64
508 // Promote i1/i8/i16/v1i1 arguments to i32.
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFCallingConv.td18 // Promote i8/i16/i32 args to i64
36 // Promote i8/i16/i32 args to i64
H A DBPFISelLowering.cpp124 setOperationAction(ISD::BSWAP, MVT::i32, Promote); in BPFTargetLowering()
126 STI.getHasJmp32() ? Custom : Promote); in BPFTargetLowering()
141 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering()
142 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering()
143 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp128 setOperationAction(ISD::SETCC, MVT::f16, Promote); in MipsSETargetLowering()
129 setOperationAction(ISD::BR_CC, MVT::f16, Promote); in MipsSETargetLowering()
130 setOperationAction(ISD::SELECT_CC, MVT::f16, Promote); in MipsSETargetLowering()
131 setOperationAction(ISD::SELECT, MVT::f16, Promote); in MipsSETargetLowering()
132 setOperationAction(ISD::FADD, MVT::f16, Promote); in MipsSETargetLowering()
133 setOperationAction(ISD::FSUB, MVT::f16, Promote); in MipsSETargetLowering()
134 setOperationAction(ISD::FMUL, MVT::f16, Promote); in MipsSETargetLowering()
135 setOperationAction(ISD::FDIV, MVT::f16, Promote); in MipsSETargetLowering()
136 setOperationAction(ISD::FREM, MVT::f16, Promote); in MipsSETargetLowering()
137 setOperationAction(ISD::FMA, MVT::f16, Promote); in MipsSETargetLowering()
[all …]
H A DMipsCallingConv.td81 // Promote i8/i16 arguments to i32.
96 // Promote i1/i8/i16 return values to i32.
265 // Promote i8/i16 arguments to i32.
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVECallingConv.td31 // Promote i1/i8/i16/i32 arguments to i64.
62 // Promote i1/i8/i16/i32 arguments to i64.
79 // Promote i1/i8/i16/i32 return values to i64.
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp65 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
66 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
67 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
121 setOperationAction(ISD::MUL, MVT::i8, Promote); in MSP430TargetLowering()
122 setOperationAction(ISD::MULHS, MVT::i8, Promote); in MSP430TargetLowering()
123 setOperationAction(ISD::MULHU, MVT::i8, Promote); in MSP430TargetLowering()
124 setOperationAction(ISD::SMUL_LOHI, MVT::i8, Promote); in MSP430TargetLowering()
125 setOperationAction(ISD::UMUL_LOHI, MVT::i8, Promote); in MSP430TargetLowering()
132 setOperationAction(ISD::UDIV, MVT::i8, Promote); in MSP430TargetLowering()
133 setOperationAction(ISD::UDIVREM, MVT::i8, Promote); in MSP430TargetLowering()
[all …]
H A DMSP430CallingConv.td29 // Promote i8 arguments to i16.
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp66 setOperationAction(ISD::LOAD, MVT::f32, Promote); in AMDGPUTargetLowering()
69 setOperationAction(ISD::LOAD, MVT::v2f32, Promote); in AMDGPUTargetLowering()
72 setOperationAction(ISD::LOAD, MVT::v3f32, Promote); in AMDGPUTargetLowering()
75 setOperationAction(ISD::LOAD, MVT::v4f32, Promote); in AMDGPUTargetLowering()
78 setOperationAction(ISD::LOAD, MVT::v5f32, Promote); in AMDGPUTargetLowering()
81 setOperationAction(ISD::LOAD, MVT::v8f32, Promote); in AMDGPUTargetLowering()
84 setOperationAction(ISD::LOAD, MVT::v16f32, Promote); in AMDGPUTargetLowering()
87 setOperationAction(ISD::LOAD, MVT::v32f32, Promote); in AMDGPUTargetLowering()
90 setOperationAction(ISD::LOAD, MVT::i64, Promote); in AMDGPUTargetLowering()
93 setOperationAction(ISD::LOAD, MVT::v2i64, Promote); in AMDGPUTargetLowering()
[all …]
H A DSIISelLowering.cpp187 setOperationAction(ISD::SELECT, MVT::i1, Promote); in SITargetLowering()
189 setOperationAction(ISD::SELECT, MVT::f64, Promote); in SITargetLowering()
198 setOperationAction(ISD::SETCC, MVT::i1, Promote); in SITargetLowering()
279 setOperationAction(ISD::BUILD_VECTOR, Vec64, Promote); in SITargetLowering()
282 setOperationAction(ISD::EXTRACT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
285 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
288 setOperationAction(ISD::SCALAR_TO_VECTOR, Vec64, Promote); in SITargetLowering()
293 setOperationAction(ISD::BUILD_VECTOR, Vec64, Promote); in SITargetLowering()
296 setOperationAction(ISD::EXTRACT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
299 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kCallingConv.td73 /// Promote i1/i8/i16 arguments to i32.
88 /// Promote i1/i8/i16 arguments to i32.
/netbsd-src/sys/dev/raidframe/
H A Drf_diskqueue.c368 if (!queue->qPtr->Promote) in rf_DiskIOPromote()
371 retval = (queue->qPtr->Promote) (queue->qHdr, parityStripeID, which_ru); in rf_DiskIOPromote()
H A Drf_diskqueue.h95 int (*Promote) (void *, RF_StripeNum_t, RF_ReconUnitNum_t); /* promotes priority of member
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
H A DXCoreCallingConv.td27 // Promote i8/i16 arguments to i32.
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
H A DARCCallingConv.td28 // Promote i8/i16 arguments to i32.
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1562 setOperationAction(ISD::CTLZ, MVT::i8, Promote); in HexagonTargetLowering()
1563 setOperationAction(ISD::CTLZ, MVT::i16, Promote); in HexagonTargetLowering()
1564 setOperationAction(ISD::CTTZ, MVT::i8, Promote); in HexagonTargetLowering()
1565 setOperationAction(ISD::CTTZ, MVT::i16, Promote); in HexagonTargetLowering()
1568 setOperationAction(ISD::CTPOP, MVT::i8, Promote); in HexagonTargetLowering()
1569 setOperationAction(ISD::CTPOP, MVT::i16, Promote); in HexagonTargetLowering()
1570 setOperationAction(ISD::CTPOP, MVT::i32, Promote); in HexagonTargetLowering()
1670 setOperationAction(ISD::SELECT, VT, Promote); in HexagonTargetLowering()
1764 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Promote); in HexagonTargetLowering()
1765 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote); in HexagonTargetLowering()
[all …]
/netbsd-src/external/gpl3/binutils.old/dist/gprof/
H A DChangeLog-201333 * aarch64.c (aarch64_find_call): Promote to bfd_vma before sign
/netbsd-src/external/gpl3/binutils/dist/gprof/
H A DChangeLog-201333 * aarch64.c (aarch64_find_call): Promote to bfd_vma before sign
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.td36 // Promote i32 to i64 if it has an explicit extension type.
93 // Promote i32 to i64 if it has an explicit extension type.
264 // Promote f32 to f64, if it needs to be passed in GPRs.
/netbsd-src/external/apache2/llvm/dist/clang/utils/TableGen/
H A DMveEmitter.cpp1043 Result::Ptr getCodeForArg(unsigned ArgNum, const Type *ArgType, bool Promote,
1305 bool Promote, bool Immediate) { in getCodeForArg() argument
1309 if (Promote) { in getCodeForArg()
1375 bool Promote = true; in ACLEIntrinsic() local
1378 Promote = false; in ACLEIntrinsic()
1430 ME.getCodeForArg(i, ArgType, Promote, Immediate); in ACLEIntrinsic()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetLowering.h197 Promote, // This operation should be executed in a larger type. enumerator
553 if (getOperationAction(ISD::LOAD, LoadMVT) == Promote && in isLoadBitCastBeneficial()
1129 getOperationAction(Op, VT) == Promote);
1144 getOperationAction(Op, VT) == Promote);
1345 assert(Action != Promote && "Can't promote condition code!"); in getCondCodeAction()
1364 assert(getOperationAction(Op, VT) == Promote && in getTypeToPromoteTo()
1382 getOperationAction(Op, NVT) == Promote); in getTypeToPromoteTo()
2255 setOperationAction(Opc, OrigVT, Promote); in setOperationPromotedToType()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp156 void Promote(SDNode *Node, SmallVectorImpl<SDValue> &Results);
513 case TargetLowering::Promote: in LegalizeOp()
515 Promote(Node, ResultVals); in LegalizeOp()
571 void VectorLegalizer::Promote(SDNode *Node, SmallVectorImpl<SDValue> &Results) { in Promote() function in VectorLegalizer
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp377 setFP16OperationAction(ISD::SETCC, MVT::f16, Legal, Promote); in NVPTXTargetLowering()
454 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in NVPTXTargetLowering()
455 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in NVPTXTargetLowering()
522 setFP16OperationAction(Op, MVT::f16, Legal, Promote); in NVPTXTargetLowering()
541 setOperationAction(ISD::FROUND, MVT::f16, Promote); in NVPTXTargetLowering()
558 setOperationAction(Op, MVT::f16, Promote); in NVPTXTargetLowering()
563 setOperationAction(ISD::FMINNUM, MVT::f16, Promote); in NVPTXTargetLowering()
564 setOperationAction(ISD::FMAXNUM, MVT::f16, Promote); in NVPTXTargetLowering()
565 setOperationAction(ISD::FMINIMUM, MVT::f16, Promote); in NVPTXTargetLowering()
566 setOperationAction(ISD::FMAXIMUM, MVT::f16, Promote); in NVPTXTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp571 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Promote); in AArch64TargetLowering()
573 setOperationAction(ISD::FREM, MVT::f16, Promote); in AArch64TargetLowering()
576 setOperationAction(ISD::FPOW, MVT::f16, Promote); in AArch64TargetLowering()
579 setOperationAction(ISD::FPOWI, MVT::f16, Promote); in AArch64TargetLowering()
582 setOperationAction(ISD::FCOS, MVT::f16, Promote); in AArch64TargetLowering()
585 setOperationAction(ISD::FSIN, MVT::f16, Promote); in AArch64TargetLowering()
588 setOperationAction(ISD::FSINCOS, MVT::f16, Promote); in AArch64TargetLowering()
591 setOperationAction(ISD::FEXP, MVT::f16, Promote); in AArch64TargetLowering()
594 setOperationAction(ISD::FEXP2, MVT::f16, Promote); in AArch64TargetLowering()
597 setOperationAction(ISD::FLOG, MVT::f16, Promote); in AArch64TargetLowering()
[all …]

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