Searched refs:PrefReg (Results 1 – 4 of 4) sorted by relevance
765 void setRegAllocationHint(Register VReg, unsigned Type, Register PrefReg) { in setRegAllocationHint() argument769 RegAllocHints[VReg].second.push_back(PrefReg); in setRegAllocationHint()774 void addRegAllocationHint(Register VReg, Register PrefReg) { in addRegAllocationHint() argument776 RegAllocHints[VReg].second.push_back(PrefReg); in addRegAllocationHint()781 void setSimpleHint(Register VReg, Register PrefReg) { in setSimpleHint() argument782 setRegAllocationHint(VReg, /*Type=*/0, PrefReg); in setSimpleHint()
138 case PrefReg: in addBias()381 case PrefReg: return "PrefReg"; in print()
82 PrefReg, ///< Block entry/exit prefers a register. enumerator
1242 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()1245 ? SpillPlacement::PrefReg in addSplitConstraints()1644 Ins += RegIn != (BC.Entry == SpillPlacement::PrefReg); in calcGlobalSplitCost()1646 Ins += RegOut != (BC.Exit == SpillPlacement::PrefReg); in calcGlobalSplitCost()