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Searched refs:PhysReg (Results 1 – 25 of 86) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DReachingDefAnalysis.cpp33 static bool isValidRegUseOf(const MachineOperand &MO, MCRegister PhysReg) { in isValidRegUseOf() argument
34 return isValidRegUse(MO) && MO.getReg() == PhysReg; in isValidRegUseOf()
41 static bool isValidRegDefOf(const MachineOperand &MO, MCRegister PhysReg) { in isValidRegDefOf() argument
42 return isValidRegDef(MO) && MO.getReg() == PhysReg; in isValidRegDefOf()
62 for (MCRegUnitIterator Unit(LI.PhysReg, TRI); Unit.isValid(); ++Unit) { in enterBasicBlock()
258 MCRegister PhysReg) const { in getReachingDef()
266 for (MCRegUnitIterator Unit(PhysReg, TRI); Unit.isValid(); ++Unit) { in getReachingDef()
279 MCRegister PhysReg) const { in getReachingLocalMIDef()
280 return hasLocalDefBefore(MI, PhysReg) in getReachingLocalMIDef()
281 ? getInstFromId(MI->getParent(), getReachingDef(MI, PhysReg)) in getReachingLocalMIDef()
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H A DRegAllocFast.cpp91 MCPhysReg PhysReg = 0; ///< Currently held here. member
153 void setPhysRegState(MCPhysReg PhysReg, unsigned NewState);
154 bool isPhysRegFree(MCPhysReg PhysReg) const;
157 void markRegUsedInInstr(MCPhysReg PhysReg) { in markRegUsedInInstr() argument
158 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) in markRegUsedInInstr()
163 bool isClobberedByRegMasks(MCPhysReg PhysReg) const { in isClobberedByRegMasks()
164 return llvm::any_of(RegMasks, [PhysReg](const uint32_t *Mask) { in isClobberedByRegMasks()
165 return MachineOperand::clobbersPhysReg(Mask, PhysReg); in isClobberedByRegMasks()
170 bool isRegUsedInInstr(MCPhysReg PhysReg, bool LookAtPhysRegUses) const { in isRegUsedInInstr() argument
171 if (LookAtPhysRegUses && isClobberedByRegMasks(PhysReg)) in isRegUsedInInstr()
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H A DLiveRegMatrix.cpp81 LiveInterval &VRegInterval, MCRegister PhysReg, in foreachUnit() argument
84 for (MCRegUnitMaskIterator Units(PhysReg, TRI); Units.isValid(); ++Units) { in foreachUnit()
96 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) { in foreachUnit()
104 void LiveRegMatrix::assign(LiveInterval &VirtReg, MCRegister PhysReg) { in assign() argument
106 << printReg(PhysReg, TRI) << ':'); in assign()
108 VRM->assignVirt2Phys(VirtReg.reg(), PhysReg); in assign()
111 TRI, VirtReg, PhysReg, [&](unsigned Unit, const LiveRange &Range) { in assign()
122 Register PhysReg = VRM->getPhys(VirtReg.reg()); in unassign() local
124 << " from " << printReg(PhysReg, TRI) << ':'); in unassign()
127 foreachUnit(TRI, VirtReg, PhysReg, in unassign()
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H A DRegAllocGreedy.cpp319 void addEviction(MCRegister PhysReg, Register Evictor, Register Evictee) { in addEviction() argument
321 Evictees[Evictee].second = PhysReg; in addEviction()
353 MCRegister PhysReg; member
366 PhysReg = Reg; in reset()
476 MCRegister PhysReg, SlotIndex Start,
484 bool mayRecolorAllInterferences(MCRegister PhysReg, LiveInterval &VirtReg,
509 AllocationOrder &Order, MCRegister PhysReg,
538 MCRegister PhysReg; member
540 HintInfo(BlockFrequency Freq, Register Reg, MCRegister PhysReg) in HintInfo()
541 : Freq(Freq), Reg(Reg), PhysReg(PhysReg) {} in HintInfo()
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H A DRegAllocBasic.cpp122 bool spillInterferences(LiveInterval &VirtReg, MCRegister PhysReg,
209 bool RABasic::spillInterferences(LiveInterval &VirtReg, MCRegister PhysReg, in spillInterferences() argument
216 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) { in spillInterferences()
226 LLVM_DEBUG(dbgs() << "spilling " << printReg(PhysReg, TRI) in spillInterferences()
269 for (MCRegister PhysReg : Order) { in selectOrSplit() local
270 assert(PhysReg.isValid()); in selectOrSplit()
272 switch (Matrix->checkInterference(VirtReg, PhysReg)) { in selectOrSplit()
275 return PhysReg; in selectOrSplit()
279 PhysRegSpillCands.push_back(PhysReg); in selectOrSplit()
289 for (MCRegister &PhysReg : PhysRegSpillCands) { in selectOrSplit()
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H A DVirtRegMap.cpp190 void addLiveInsForSubRanges(const LiveInterval &LI, MCRegister PhysReg) const;
279 MCRegister PhysReg) const { in addLiveInsForSubRanges()
318 MBB->addLiveIn(PhysReg, LaneMask); in addLiveInsForSubRanges()
334 Register PhysReg = VRM->getPhys(VirtReg); in addMBBLiveIns() local
335 if (PhysReg == VirtRegMap::NO_PHYS_REG) { in addMBBLiveIns()
343 addLiveInsForSubRanges(LI, PhysReg); in addMBBLiveIns()
353 MBB->addLiveIn(PhysReg); in addMBBLiveIns()
544 MCRegister PhysReg = VRM->getPhys(VirtReg); in rewrite() local
545 if (PhysReg == VirtRegMap::NO_PHYS_REG) in rewrite()
548 assert(Register(PhysReg).isPhysical()); in rewrite()
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H A DRegisterClassInfo.cpp113 unsigned PhysReg = RawOrder[i]; in compute() local
115 if (Reserved.test(PhysReg)) in compute()
117 uint8_t Cost = RegCosts[PhysReg]; in compute()
120 if (CalleeSavedAliases[PhysReg] && in compute()
121 !STI.ignoreCSRForAllocationOrder(*MF, PhysReg)) in compute()
123 CSRAlias.push_back(PhysReg); in compute()
127 RCI.Order[N++] = PhysReg; in compute()
136 unsigned PhysReg = CSRAlias[i]; in compute() local
137 uint8_t Cost = RegCosts[PhysReg]; in compute()
140 RCI.Order[N++] = PhysReg; in compute()
H A DInterferenceCache.cpp63 InterferenceCache::Entry *InterferenceCache::get(MCRegister PhysReg) { in get() argument
64 unsigned char E = PhysRegEntries[PhysReg.id()]; in get()
65 if (E < CacheEntries && Entries[E].getPhysReg() == PhysReg) { in get()
81 Entries[E].reset(PhysReg, LIUArray, TRI, MF); in get()
82 PhysRegEntries[PhysReg] = E; in get()
96 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units, ++i) in revalidate()
107 PhysReg = physReg; in reset()
113 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) { in reset()
122 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units, ++i) { in valid()
194 if (MachineOperand::clobbersPhysReg(RegMaskBits[i], PhysReg)) { in update()
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H A DInterferenceCache.h47 MCRegister PhysReg = 0; variable
105 PhysReg = MCRegister::NoRegister; in clear()
111 MCRegister getPhysReg() const { return PhysReg; } in getPhysReg()
155 Entry *get(MCRegister PhysReg);
208 void setPhysReg(InterferenceCache &Cache, MCRegister PhysReg) { in setPhysReg() argument
212 if (PhysReg.isValid()) in setPhysReg()
213 setEntry(Cache.get(PhysReg)); in setPhysReg()
H A DMachineRegisterInfo.cpp513 bool MachineRegisterInfo::isConstantPhysReg(MCRegister PhysReg) const { in isConstantPhysReg()
514 assert(Register::isPhysicalRegister(PhysReg)); in isConstantPhysReg()
517 if (TRI->isConstantPhysReg(PhysReg)) in isConstantPhysReg()
522 for (MCRegAliasIterator AI(PhysReg, TRI, true); in isConstantPhysReg()
570 bool MachineRegisterInfo::isPhysRegModified(MCRegister PhysReg, in isPhysRegModified() argument
572 if (UsedPhysRegMask.test(PhysReg)) in isPhysRegModified()
575 for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI) { in isPhysRegModified()
585 bool MachineRegisterInfo::isPhysRegUsed(MCRegister PhysReg) const { in isPhysRegUsed()
586 if (UsedPhysRegMask.test(PhysReg)) in isPhysRegUsed()
589 for (MCRegAliasIterator AliasReg(PhysReg, TRI, true); AliasReg.isValid(); in isPhysRegUsed()
H A DLiveRangeCalc.cpp89 void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg, in extend() argument
107 if (findReachingDefs(LR, *UseMBB, Use, PhysReg, Undefs)) in extend()
194 SlotIndex Use, unsigned PhysReg, in findReachingDefs() argument
214 errs() << "Use of " << printReg(PhysReg, MRI->getTargetRegisterInfo()) in findReachingDefs()
222 if (Register::isPhysicalRegister(PhysReg) && !MBB->isLiveIn(PhysReg)) { in findReachingDefs()
225 errs() << "The register " << printReg(PhysReg, TRI) in findReachingDefs()
H A DMachineBasicBlock.cpp418 OS << LS << printReg(LI.PhysReg, TRI); in print()
559 LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; }); in removeLiveIn()
577 LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; }); in isLiveIn()
584 return LI0.PhysReg < LI1.PhysReg; in sortUniqueLiveIns()
591 MCRegister PhysReg = I->PhysReg; in sortUniqueLiveIns() local
593 for (J = std::next(I); J != LiveIns.end() && J->PhysReg == PhysReg; ++J) in sortUniqueLiveIns()
595 Out->PhysReg = PhysReg; in sortUniqueLiveIns()
602 MachineBasicBlock::addLiveIn(MCRegister PhysReg, const TargetRegisterClass *RC) { in addLiveIn() argument
604 assert(Register::isPhysicalRegister(PhysReg) && "Expected physreg"); in addLiveIn()
609 bool LiveIn = isLiveIn(PhysReg); in addLiveIn()
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DReachingDefAnalysis.h142 int getReachingDef(MachineInstr *MI, MCRegister PhysReg) const;
146 MCRegister PhysReg) const;
150 bool isReachingDefLiveOut(MachineInstr *MI, MCRegister PhysReg) const;
155 MCRegister PhysReg) const;
160 MCRegister PhysReg) const;
172 bool hasLocalDefBefore(MachineInstr *MI, MCRegister PhysReg) const;
176 bool isRegUsedAfter(MachineInstr *MI, MCRegister PhysReg) const;
179 bool isRegDefinedAfter(MachineInstr *MI, MCRegister PhysReg) const;
183 int getClearance(MachineInstr *MI, MCRegister PhysReg) const;
187 void getReachingLocalUses(MachineInstr *MI, MCRegister PhysReg,
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H A DLiveRegMatrix.h107 InterferenceKind checkInterference(LiveInterval &VirtReg, MCRegister PhysReg);
114 bool checkInterference(SlotIndex Start, SlotIndex End, MCRegister PhysReg);
119 void assign(LiveInterval &VirtReg, MCRegister PhysReg);
127 bool isPhysRegUsed(MCRegister PhysReg) const;
140 MCRegister PhysReg = MCRegister::NoRegister);
145 bool checkRegUnitInterference(LiveInterval &VirtReg, MCRegister PhysReg);
157 Register getOneVReg(unsigned PhysReg) const;
H A DRegisterClassInfo.h116 MCRegister getLastCalleeSavedAlias(MCRegister PhysReg) const { in getLastCalleeSavedAlias() argument
117 if (PhysReg.id() < CalleeSavedAliases.size()) in getLastCalleeSavedAlias()
118 return CalleeSavedAliases[PhysReg]; in getLastCalleeSavedAlias()
H A DMachineBasicBlock.h103 MCPhysReg PhysReg;
106 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask)
107 : PhysReg(PhysReg), LaneMask(LaneMask) {}
367 void addLiveIn(MCRegister PhysReg,
369 LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask));
386 Register addLiveIn(MCRegister PhysReg, const TargetRegisterClass *RC);
438 if (LiveRegI->PhysReg == ExceptionPointer ||
439 LiveRegI->PhysReg == ExceptionSelector)
450 (LiveRegI->PhysReg == ExceptionPointer ||
451 LiveRegI->PhysReg == ExceptionSelector));
H A DMachineRegisterInfo.h620 bool isConstantPhysReg(MCRegister PhysReg) const;
856 bool isPhysRegModified(MCRegister PhysReg, bool SkipNoReturnDef = false) const;
862 bool isPhysRegUsed(MCRegister PhysReg) const;
897 bool canReserveReg(MCRegister PhysReg) const { in canReserveReg() argument
898 return !reservedRegsFrozen() || ReservedRegs.test(PhysReg); in canReserveReg()
915 bool isReserved(MCRegister PhysReg) const { in isReserved() argument
916 return getReservedRegs().test(PhysReg.id()); in isReserved()
933 bool isAllocatable(MCRegister PhysReg) const { in isAllocatable() argument
934 return getTargetRegisterInfo()->isInAllocatableClass(PhysReg) && in isAllocatable()
935 !isReserved(PhysReg); in isAllocatable()
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/
H A DRegisterAliasing.cpp17 for (const size_t PhysReg : SourceBits.set_bits()) { in getAliasedBits() local
19 for (auto Itr = RegAliasItr(PhysReg, &RegInfo, true); Itr.isValid(); in getAliasedBits()
35 for (MCPhysReg PhysReg : RegClass) in RegisterAliasingTracker() local
36 if (!ReservedReg[PhysReg]) // Removing reserved registers. in RegisterAliasingTracker()
37 SourceBits.set(PhysReg); in RegisterAliasingTracker()
42 const MCPhysReg PhysReg) in RegisterAliasingTracker() argument
44 SourceBits.set(PhysReg); in RegisterAliasingTracker()
51 for (const size_t PhysReg : SourceBits.set_bits()) { in FillOriginAndAliasedBits() local
52 for (auto Itr = RegAliasItr(PhysReg, &RegInfo, true); Itr.isValid(); in FillOriginAndAliasedBits()
55 Origins[*Itr] = PhysReg; in FillOriginAndAliasedBits()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIPreAllocateWWMRegs.cpp103 for (MCRegister PhysReg : RegClassInfo.getOrder(MRI->getRegClass(Reg))) { in processDef() local
104 if (!MRI->isPhysRegUsed(PhysReg) && in processDef()
105 Matrix->checkInterference(LI, PhysReg) == LiveRegMatrix::IK_Free) { in processDef()
106 Matrix->assign(LI, PhysReg); in processDef()
107 assert(PhysReg != 0); in processDef()
131 Register PhysReg = VRM->getPhys(VirtReg); in rewriteRegs() local
134 PhysReg = TRI->getSubReg(PhysReg, SubReg); in rewriteRegs()
138 MO.setReg(PhysReg); in rewriteRegs()
150 const Register PhysReg = VRM->getPhys(Reg); in rewriteRegs() local
151 assert(PhysReg != 0); in rewriteRegs()
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H A DGCNNSAReassign.cpp176 Register PhysReg = VRM->getPhys(Reg); in CheckNSA() local
179 if (!PhysReg) in CheckNSA()
203 if (Def && Def->isCopy() && Def->getOperand(1).getReg() == PhysReg) in CheckNSA()
210 if (UseInst->isCopy() && UseInst->getOperand(0).getReg() == PhysReg) in CheckNSA()
219 VgprBase = PhysReg; in CheckNSA()
220 else if (VgprBase + I != PhysReg) in CheckNSA()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp109 virtual void markPhysRegUsed(unsigned PhysReg) { in markPhysRegUsed() argument
110 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
111 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
128 void markPhysRegUsed(unsigned PhysReg) override { in markPhysRegUsed() argument
129 MIB.addDef(PhysReg, RegState::Implicit); in markPhysRegUsed()
140 Register PhysReg = VA.getLocReg(); in assignValueToReg() local
141 if (VT == MVT::f64 && PhysReg >= Mips::A0 && PhysReg <= Mips::A3) { in assignValueToReg()
146 auto Lo = MIRBuilder.buildCopy(s32, Register(PhysReg + (IsEL ? 0 : 1))); in assignValueToReg()
147 auto Hi = MIRBuilder.buildCopy(s32, Register(PhysReg + (IsEL ? 1 : 0))); in assignValueToReg()
149 markPhysRegUsed(PhysReg); in assignValueToReg()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp111 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
114 assert(VA.getLocReg() == PhysReg && "Assigning to the wrong reg?"); in assignValueToReg()
120 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
121 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
282 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
285 assert(VA.getLocReg() == PhysReg && "Assigning to the wrong reg?"); in assignValueToReg()
293 markPhysRegUsed(PhysReg); in assignValueToReg()
295 MIRBuilder.buildCopy(ValVReg, PhysReg); in assignValueToReg()
302 auto PhysRegToVReg = MIRBuilder.buildCopy(LLT::scalar(LocSize), PhysReg); in assignValueToReg()
346 virtual void markPhysRegUsed(unsigned PhysReg) = 0;
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86CallLowering.cpp107 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
109 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
111 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
198 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
200 markPhysRegUsed(PhysReg); in assignValueToReg()
201 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA); in assignValueToReg()
207 virtual void markPhysRegUsed(unsigned PhysReg) = 0;
217 void markPhysRegUsed(unsigned PhysReg) override { in markPhysRegUsed()
218 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
219 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp42 Register PhysReg = VRM->getPhys(MO.getReg()); in getRC32() local
43 if (SystemZ::GR32BitRegClass.contains(PhysReg)) in getRC32()
45 assert (SystemZ::GRH32BitRegClass.contains(PhysReg) && in getRC32()
110 Register PhysReg = Register::isPhysicalRegister(Reg) in getRegAllocationHints() local
113 if (PhysReg) { in getRegAllocationHints()
115 PhysReg = getSubReg(PhysReg, MO->getSubReg()); in getRegAllocationHints()
117 PhysReg = getMatchingSuperReg(PhysReg, VRRegMO->getSubReg(), in getRegAllocationHints()
119 if (!MRI->isReserved(PhysReg) && !is_contained(Hints, PhysReg)) in getRegAllocationHints()
120 TwoAddrHints.insert(PhysReg); in getRegAllocationHints()
/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DFastISelEmitter.cpp427 std::string PhysReg; in PhyRegForNode() local
430 return PhysReg; in PhyRegForNode()
434 return PhysReg; in PhyRegForNode()
436 PhysReg += cast<StringInit>(OpLeafRec->getValue("Namespace")->getValue()) in PhyRegForNode()
438 PhysReg += "::"; in PhyRegForNode()
439 PhysReg += Target.getRegBank().getReg(OpLeafRec)->getName(); in PhyRegForNode()
440 return PhysReg; in PhyRegForNode()
546 std::string PhysReg = PhyRegForNode(InstPatNode->getChild(i), Target); in collectPatterns() local
547 if (PhysReg.empty()) { in collectPatterns()
557 PhysRegInputs.push_back(PhysReg); in collectPatterns()

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