Searched refs:PPRRegClass (Results 1 – 6 of 6) sorted by relevance
759 } else if (AArch64::PPRRegClass.contains(Reg)) { in PrintAsmOperand()760 RegClass = &AArch64::PPRRegClass; in PrintAsmOperand()
50 if (AArch64::PPRRegClass.contains(Reg)) in regNeedsCFI()
2291 else if (AArch64::PPRRegClass.contains(RPI.Reg1)) in computeCalleeSaveRegisterPairs()2803 if (AArch64::PPRRegClass.contains(Reg) || in determineCalleeSaves()2960 AArch64::PPRRegClass.contains(CS.getReg())) { in getSVECalleeSaveSlotRange()
3287 if (AArch64::PPRRegClass.contains(DestReg) && in copyPhysReg()3288 AArch64::PPRRegClass.contains(SrcReg)) { in copyPhysReg()3620 else if (AArch64::PPRRegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()3774 else if (AArch64::PPRRegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
283 addRegisterClass(MVT::nxv2i1, &AArch64::PPRRegClass); in AArch64TargetLowering()284 addRegisterClass(MVT::nxv4i1, &AArch64::PPRRegClass); in AArch64TargetLowering()285 addRegisterClass(MVT::nxv8i1, &AArch64::PPRRegClass); in AArch64TargetLowering()286 addRegisterClass(MVT::nxv16i1, &AArch64::PPRRegClass); in AArch64TargetLowering()4901 RC = &AArch64::PPRRegClass; in LowerFormalArguments()7952 : std::make_pair(0U, &AArch64::PPRRegClass); in getRegForInlineAsmConstraint()
4168 auto PPRRegClass = AArch64MCRegisterClasses[AArch64::PPRRegClassID]; in validateInstruction() local4175 PPRRegClass.contains(Inst.getOperand(i).getReg())) { in validateInstruction()