Searched refs:PIPESTAT (Results 1 – 6 of 6) sorted by relevance
98 i915_reg_t reg = PIPESTAT(crtc->pipe); in i9xx_check_fifo_underruns()119 i915_reg_t reg = PIPESTAT(pipe); in i9xx_set_fifo_underrun_reporting()
18695 error->pipe[i].stat = I915_READ(PIPESTAT(i)); in intel_display_capture_error_state()
462 i915_reg_t reg = PIPESTAT(pipe); in i915_enable_pipestat()485 i915_reg_t reg = PIPESTAT(pipe); in i915_disable_pipestat()1292 I915_WRITE(PIPESTAT(pipe), in i9xx_pipestat_irq_reset()1345 reg = PIPESTAT(pipe); in i9xx_pipestat_irq_ack()
480 I915_READ(PIPESTAT(pipe))); in i915_interrupt_info()569 I915_READ(PIPESTAT(pipe))); in i915_interrupt_info()609 I915_READ(PIPESTAT(pipe))); in i915_interrupt_info()
5875 #define PIPESTAT(pipe) _MMIO_PIPE2(pipe, _PIPEASTAT) macro
1992 MMIO_D(PIPESTAT(PIPE_A), D_ALL); in init_generic_mmio_info()1993 MMIO_D(PIPESTAT(PIPE_B), D_ALL); in init_generic_mmio_info()1994 MMIO_D(PIPESTAT(PIPE_C), D_ALL); in init_generic_mmio_info()1995 MMIO_D(PIPESTAT(_PIPE_EDP), D_ALL); in init_generic_mmio_info()