Searched refs:PCH_DPLL (Results 1 – 3 of 3) sorted by relevance
388 val = I915_READ(PCH_DPLL(id)); in ibx_pch_dpll_get_hw_state()428 I915_WRITE(PCH_DPLL(id), pll->state.hw_state.dpll); in ibx_pch_dpll_enable()431 POSTING_READ(PCH_DPLL(id)); in ibx_pch_dpll_enable()439 I915_WRITE(PCH_DPLL(id), pll->state.hw_state.dpll); in ibx_pch_dpll_enable()440 POSTING_READ(PCH_DPLL(id)); in ibx_pch_dpll_enable()449 I915_WRITE(PCH_DPLL(id), 0); in ibx_pch_dpll_disable()450 POSTING_READ(PCH_DPLL(id)); in ibx_pch_dpll_disable()
9396 u32 temp = I915_READ(PCH_DPLL(i)); in ilk_init_pch_refclk()
8245 #define PCH_DPLL(pll) _MMIO((pll) == 0 ? _PCH_DPLL_A : _PCH_DPLL_B) macro