| /netbsd-src/external/gpl3/binutils/dist/opcodes/ |
| H A D | ia64-opc-a.c | 150 {"cmp.lt", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY}, 151 {"cmp.le", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R3, R2}, EMPTY}, 152 {"cmp.gt", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R3, R2}, EMPTY}, 153 {"cmp.ge", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY}, 154 {"cmp.lt.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY}, 155 {"cmp.le.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R3, R2}, EMPTY}, 156 {"cmp.gt.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R3, R2}, EMPTY}, 157 {"cmp.ge.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY}, 158 {"cmp.eq.and", A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY}, 159 {"cmp.ne.andcm", A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL}, [all …]
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| H A D | ia64-opc-f.c | 309 {"fcmp.eq.s0", f2, OpRaRbTaSf (4, 0, 0, 0, 0), {P1, P2, F2, F3}, EMPTY}, 310 {"fcmp.eq", f2, OpRaRbTaSf (4, 0, 0, 0, 0), {P1, P2, F2, F3}, PSEUDO, 0, NULL}, 311 {"fcmp.eq.s1", f2, OpRaRbTaSf (4, 0, 0, 0, 1), {P1, P2, F2, F3}, EMPTY}, 312 {"fcmp.eq.s2", f2, OpRaRbTaSf (4, 0, 0, 0, 2), {P1, P2, F2, F3}, EMPTY}, 313 {"fcmp.eq.s3", f2, OpRaRbTaSf (4, 0, 0, 0, 3), {P1, P2, F2, F3}, EMPTY}, 314 {"fcmp.lt.s0", f2, OpRaRbTaSf (4, 0, 1, 0, 0), {P1, P2, F2, F3}, EMPTY}, 315 {"fcmp.lt", f2, OpRaRbTaSf (4, 0, 1, 0, 0), {P1, P2, F2, F3}, PSEUDO, 0, NULL}, 316 {"fcmp.lt.s1", f2, OpRaRbTaSf (4, 0, 1, 0, 1), {P1, P2, F2, F3}, EMPTY}, 317 {"fcmp.lt.s2", f2, OpRaRbTaSf (4, 0, 1, 0, 2), {P1, P2, F2, F3}, EMPTY}, 318 {"fcmp.lt.s3", f2, OpRaRbTaSf (4, 0, 1, 0, 3), {P1, P2, F2, F3}, EMPTY}, [all …]
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| /netbsd-src/external/gpl3/binutils.old/dist/opcodes/ |
| H A D | ia64-opc-a.c | 150 {"cmp.lt", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY}, 151 {"cmp.le", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R3, R2}, EMPTY}, 152 {"cmp.gt", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R3, R2}, EMPTY}, 153 {"cmp.ge", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY}, 154 {"cmp.lt.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY}, 155 {"cmp.le.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R3, R2}, EMPTY}, 156 {"cmp.gt.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R3, R2}, EMPTY}, 157 {"cmp.ge.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY}, 158 {"cmp.eq.and", A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY}, 159 {"cmp.ne.andcm", A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL}, [all …]
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| H A D | ia64-opc-f.c | 309 {"fcmp.eq.s0", f2, OpRaRbTaSf (4, 0, 0, 0, 0), {P1, P2, F2, F3}, EMPTY}, 310 {"fcmp.eq", f2, OpRaRbTaSf (4, 0, 0, 0, 0), {P1, P2, F2, F3}, PSEUDO, 0, NULL}, 311 {"fcmp.eq.s1", f2, OpRaRbTaSf (4, 0, 0, 0, 1), {P1, P2, F2, F3}, EMPTY}, 312 {"fcmp.eq.s2", f2, OpRaRbTaSf (4, 0, 0, 0, 2), {P1, P2, F2, F3}, EMPTY}, 313 {"fcmp.eq.s3", f2, OpRaRbTaSf (4, 0, 0, 0, 3), {P1, P2, F2, F3}, EMPTY}, 314 {"fcmp.lt.s0", f2, OpRaRbTaSf (4, 0, 1, 0, 0), {P1, P2, F2, F3}, EMPTY}, 315 {"fcmp.lt", f2, OpRaRbTaSf (4, 0, 1, 0, 0), {P1, P2, F2, F3}, PSEUDO, 0, NULL}, 316 {"fcmp.lt.s1", f2, OpRaRbTaSf (4, 0, 1, 0, 1), {P1, P2, F2, F3}, EMPTY}, 317 {"fcmp.lt.s2", f2, OpRaRbTaSf (4, 0, 1, 0, 2), {P1, P2, F2, F3}, EMPTY}, 318 {"fcmp.lt.s3", f2, OpRaRbTaSf (4, 0, 1, 0, 3), {P1, P2, F2, F3}, EMPTY}, [all …]
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| /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/ |
| H A D | a3.s | 6 loadsym P1, middle; 8 R0 = W [ P1 + -2 ] (Z); DBGA ( R0.L , 49 ); 9 R0 = W [ P1 + -4 ] (Z); DBGA ( R0.L , 48 ); 10 R0 = W [ P1 + -6 ] (Z); DBGA ( R0.L , 47 ); 11 R0 = W [ P1 + -8 ] (Z); DBGA ( R0.L , 46 ); 12 R0 = W [ P1 + -10 ] (Z); DBGA ( R0.L , 45 ); 13 R0 = W [ P1 + -12 ] (Z); DBGA ( R0.L , 44 ); 14 R0 = W [ P1 + -14 ] (Z); DBGA ( R0.L , 43 ); 15 R0 = W [ P1 + -16 ] (Z); DBGA ( R0.L , 42 ); 16 R0 = W [ P1 + -18 ] (Z); DBGA ( R0.L , 41 ); [all …]
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| H A D | c_comp3op_pr_plus_pr_sh2.s | 15 P1 = P1 + ( P1 << 2 ); define 16 P2 = P1 + ( P2 << 2 ); 17 P3 = P1 + ( P3 << 2 ); 18 P4 = P1 + ( P4 << 2 ); 19 P5 = P1 + ( P5 << 2 ); 20 SP = P1 + ( SP << 2 ); 21 FP = P1 + FP; 37 P1 = P2 + ( P1 << 2 ); define 59 P1 = P3 + ( P1 << 2 ); define 81 P1 = P4 + ( P1 << 2 ); define [all …]
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| H A D | c_comp3op_pr_plus_pr_sh1.s | 15 P1 = P1 + ( P1 << 1 ); define 16 P2 = P1 + ( P2 << 1 ); 17 P3 = P1 + ( P3 << 1 ); 18 P4 = P1 + ( P4 << 1 ); 19 P5 = P1 + ( P5 << 1 ); 20 SP = P1 + ( SP << 1 ); 21 FP = P1 + FP; 37 P1 = P2 + ( P1 << 1 ); define 59 P1 = P3 + ( P1 << 1 ); define 81 P1 = P4 + ( P1 << 1 ); define [all …]
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| H A D | c_ldstpmod_st_dreg.s | 25 P1 = 0x0004; define 34 [ P5 ++ P1 ] = R0; 35 [ P5 ++ P1 ] = R1; 41 P1 = 0x0004; define 50 R6 = [ P5 ++ P1 ]; 51 R5 = [ P5 ++ P1 ]; 83 [ P1 ++ P5 ] = R0; 84 [ P1 ++ P5 ] = R1; 85 [ P1 ++ P2 ] = R2; 86 [ P1 ++ P3 ] = R3; [all …]
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| H A D | c_ptr2op_pr_shadd_1_2.s | 20 P1 = ( P1 + P1 ) << 2; define 21 P2 = ( P2 + P1 ) << 2; 22 P3 = ( P3 + P1 ) << 2; 23 P4 = ( P4 + P1 ) << 1; 24 P5 = ( P5 + P1 ) << 2; 25 SP = ( SP + P1 ) << 2; 26 FP = ( FP + P1 ) << 1; 42 P1 = ( P1 + P2 ) << 1; define 64 P1 = ( P1 + P3 ) << 2; define 86 P1 = ( P1 + P4 ) << 1; define [all …]
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| H A D | brcc.s | 24 P1 += 8; 49 P1 += 8; 50 R6 = P1; 67 P1 += 0xc; 68 R6 = P1; 75 P1 += 4; 76 R6 = P1; 90 P1 += 8; 91 R6 = P1; 101 P1 += 8; [all …]
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| H A D | se_loop_mv2lc.S | 343 P1 = 0x3 (Z); define 358 LC0 = P1; 379 LC1 = P1; 392 LC0 = P1; 400 LC0 = P1; 415 LC0 = P1; 423 LC0 = P1; 436 LC0 = P1; 444 LC0 = P1; 455 LC0 = P1; [all …]
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| H A D | viterbi2.s | 41 loadsym P1, BranchStorage; 47 [ P1 + 0 ] = R0; 50 [ P1 + 4 ] = R0; 53 [ P1 + 8 ] = R0; 56 [ P1 + 12 ] = R0; 59 [ P1 + 16 ] = R0; 62 [ P1 + 20 ] = R0; 65 [ P1 + 24 ] = R0; 68 [ P1 + 28 ] = R0; 71 [ P1 + 32 ] = R0; [all …]
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| H A D | c_mmr_loop.S | 137 [ P0 ] = P1; // IVG15 (General) handler (Int 15) load with start 268 P1.L = DATA0; 269 P1.H = DATA0; 276 end1: [ P1 ++ ] = R0; 278 P1.L = DATA0; 279 P1.H = DATA0; 280 R0 = [ P1 ++ ]; 281 R1 = [ P1 ++ ]; 282 R2 = [ P1 ++ ]; 283 R3 = [ P1 ++ ]; [all …]
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| H A D | c_regmv_pr_dep_nostall.s | 17 P4 = P1; 21 P1 = FP; define 22 R3 = P1; 37 P1 = P2; define 38 I0 = P1; 65 P1 = P4; define 66 M0 = P1; 93 P1 = P0; define 94 L0 = P1; 120 P1 = FP; define [all …]
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| H A D | c_ldstpmod_st_lohi.s | 25 P1 = 0x0002; define 35 W [ P5 ++ P1 ] = R0.L; 36 W [ P5 ++ P1 ] = R1.L; 43 P1 = 0x0002; define 53 R6.L = W [ P5 ++ P1 ]; 54 R5.L = W [ P5 ++ P1 ]; 86 W [ P1 ++ P5 ] = R0.H; 87 W [ P1 ++ P2 ] = R1.H; 88 W [ P1 ++ P2 ] = R2.H; 89 W [ P1 ++ P3 ] = R3.H; [all …]
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| H A D | se_loop_kill_dcr.S | 343 P1 = 0x2 (Z); define 388 LSETUP ( L5T , L5T ) LC0 = P1; 393 LSETUP ( L6T , L6T ) LC0 = P1; 399 LSETUP ( L7T , L7T ) LC0 = P1; 406 LSETUP ( L8T , L8T ) LC0 = P1; 453 LSETUP ( LFT , LFB ) LC0 = P1; 460 LSETUP ( LGT , LGB ) LC0 = P1; 468 LSETUP ( LHT , LHB ) LC0 = P1; 477 LSETUP ( LIT , LIB ) LC0 = P1; 485 LSETUP ( LJT , LJB ) LC0 = P1; [all …]
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| H A D | se_loop_kill_dcr_01.S | 343 P1 = 0x2 (Z); define 388 LSETUP ( L5T , L5T ) LC0 = P1; 393 LSETUP ( L6T , L6T ) LC0 = P1; 399 LSETUP ( L7T , L7T ) LC0 = P1; 406 LSETUP ( L8T , L8T ) LC0 = P1; 453 LSETUP ( LFT , LFB ) LC0 = P1; 460 LSETUP ( LGT , LGB ) LC0 = P1; 468 LSETUP ( LHT , LHB ) LC0 = P1; 477 LSETUP ( LIT , LIB ) LC0 = P1; 485 LSETUP ( LJT , LJB ) LC0 = P1; [all …]
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| H A D | c_ptr2op_pr_sft_2_1.s | 15 P1 = P1 << 2; define 16 P2 = P1 >> 2; 17 P3 = P1 << 2; 18 P4 = P1 >> 1; 19 P5 = P1 >> 2; 20 SP = P1 << 2; 21 FP = P1 >> 1; 37 P1 = P2; define 59 P1 = P3 << 2; define 81 P1 = P4 >> 1; define [all …]
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| H A D | c_ptr2op_pr_neg_pr.s | 16 P1 -= P1; 17 P2 -= P1; 18 P3 -= P1; 19 P4 -= P1; 20 P5 -= P1; 21 SP -= P1; 22 FP -= P1; 38 P1 -= P2; 60 P1 -= P3; 82 P1 -= P4; [all …]
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| H A D | se_allopcodes.h | 67 loadsym P1, _table; variable 68 [P0] = P1; 75 loadsym P1, _usr; variable 76 RETI = P1; 97 P1 = [P4]; 101 P2 = P1; 205 R7 = LOAD_PFX[P1++]; 206 R6 = LOAD_PFX[P1++]; 207 R5 = LOAD_PFX[P1++]; 234 P1 = [P0]; [all …]
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| H A D | c_ldstpmod_ld_lohi.s | 18 P1 = 0x0002; define 28 R0.L = W [ P5 ++ P1 ]; 29 R1.L = W [ P5 ++ P1 ]; 54 R0.H = W [ P1 ++ P5 ]; 55 R1.H = W [ P1 ++ P2 ]; 56 R2.H = W [ P1 ++ P2 ]; 57 R3.H = W [ P1 ++ P3 ]; 58 R4.H = W [ P1 ++ P4 ]; 59 R5.H = W [ P1 ++ SP ]; 60 R6.H = W [ P1 ++ FP ]; [all …]
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| H A D | c_ldstpmod_ld_dreg.s | 17 P1 = 0x0004; define 28 R1 = [ P5 ++ P1 ]; 54 R0 = [ P1 ++ P5 ]; 55 R1 = [ P1 ++ P3 ]; 56 R2 = [ P1 ++ P2 ]; 57 R3 = [ P1 ++ P3 ]; 58 R4 = [ P1 ++ P4 ]; 59 R5 = [ P1 ++ SP ]; 60 R6 = [ P1 ++ FP ]; 71 P1 = 0x0004; define [all …]
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| H A D | c_ldst_st_p_d_pp.s | 37 [ P1 ++ ] = R1; 45 [ P1 ++ ] = R2; 53 [ P1 ++ ] = R3; 61 [ P1 ++ ] = R4; 69 [ P1 ++ ] = R5; 77 [ P1 ++ ] = R6; 85 [ P1 ++ ] = R7; 93 [ P1 ++ ] = R0; 111 R0 = [ P1 ++ ]; 127 R1 = [ P1 ++ ]; [all …]
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| /netbsd-src/external/mit/isl/dist/test_inputs/codegen/omega/ |
| H A D | p.delft2-0.c | 1 if (P1 >= 0 && P1 <= 3 && P2 >= 0 && P2 <= 3) 2 for (int c0 = P1 - 1; c0 <= 3; c0 += 1) 6 … if (P1 >= 1 && c0 + 1 == P1 && 4 * P1 >= 2 * c2 + 9 * floord(4 * P1 - 2 * c2 - 1, 9) + 7) { 7 …s0(P1 - 1, P2, c2, c3, ((-4 * P1 + 2 * c2 + 9) % 9) + 1, -4 * P2 + 2 * c3 - 9 * floord(-4 * P2 + 2… 8 } else if (P1 == 0 && c0 == 3 && c2 % 4 == 0) {
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| H A D | p.delft2-0.in | 1 …P1, P2] -> { s0[In_1, P2, In_3, In_4, In_5, In_6] -> [In_1, P2, In_3, In_4, In_5, In_6] : (exists … 3 [P1, P2] -> { [i0, i1, i2, i3, i4, i5] -> atomic[o0] : o0 <= 4; [i0, i1, i2, i3, i4, i5] -> separat…
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