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Searched refs:Outs (Results 1 – 25 of 71) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsCCState.h37 void PreAnalyzeReturnForF128(const SmallVectorImpl<ISD::OutputArg> &Outs);
42 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
59 PreAnalyzeReturnForVectorFloat(const SmallVectorImpl<ISD::OutputArg> &Outs);
89 AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
93 PreAnalyzeCallOperands(Outs, FuncArgs, Func); in AnalyzeCallOperands()
94 CCState::AnalyzeCallOperands(Outs, Fn); in AnalyzeCallOperands()
104 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
106 void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
130 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn() argument
132 PreAnalyzeReturnForF128(Outs); in AnalyzeReturn()
[all …]
H A DMipsCCState.cpp99 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForF128() argument
101 for (unsigned i = 0; i < Outs.size(); ++i) { in PreAnalyzeReturnForF128()
121 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForVectorFloat() argument
122 for (unsigned i = 0; i < Outs.size(); ++i) { in PreAnalyzeReturnForVectorFloat()
123 ISD::OutputArg Out = Outs[i]; in PreAnalyzeReturnForVectorFloat()
132 const SmallVectorImpl<ISD::OutputArg> &Outs, in PreAnalyzeCallOperands() argument
135 for (unsigned i = 0; i < Outs.size(); ++i) { in PreAnalyzeCallOperands()
136 TargetLowering::ArgListEntry FuncArg = FuncArgs[Outs[i].OrigArgIndex]; in PreAnalyzeCallOperands()
141 CallOperandIsFixed.push_back(Outs[i].IsFixed); in PreAnalyzeCallOperands()
H A DMipsCallLowering.cpp399 SmallVector<ISD::OutputArg, 8> Outs; in lowerReturn() local
400 subTargetRegTypeForCallingConv(F, RetInfos, OrigArgIndices, Outs); in lowerReturn()
405 CCInfo.AnalyzeReturn(Outs, TLI.CCAssignFnForReturn()); in lowerReturn()
406 setLocInfo(ArgLocs, Outs); in lowerReturn()
566 SmallVector<ISD::OutputArg, 8> Outs; in lowerCall() local
567 subTargetRegTypeForCallingConv(F, ArgInfos, OrigArgIndices, Outs); in lowerCall()
582 CCInfo.AnalyzeCallOperands(Outs, TLI.CCAssignFnForCall(), FuncOrigArgs, Call); in lowerCall()
583 setLocInfo(ArgLocs, Outs); in lowerCall()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCCCState.h23 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs);
57 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
60 IsFixed.resize(Outs.size(), false); in AnalyzeCallOperands()
61 for (unsigned ValNo = 0, E = Outs.size(); ValNo != E; ++ValNo) in AnalyzeCallOperands()
62 if (Outs[ValNo].IsFixed) in AnalyzeCallOperands()
65 CCState::AnalyzeCallOperands(Outs, Fn); in AnalyzeCallOperands()
H A DPPCCCState.cpp17 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeCallOperands() argument
18 for (const auto &I : Outs) { in PreAnalyzeCallOperands()
H A DPPCISelLowering.h1178 bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs,
1261 const SmallVectorImpl<ISD::OutputArg> &Outs,
1265 const SmallVectorImpl<ISD::OutputArg> &Outs,
1292 const SmallVectorImpl<ISD::OutputArg> &Outs,
1299 const SmallVectorImpl<ISD::OutputArg> &Outs,
1306 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DCallingConvLower.cpp104 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in CheckReturn() argument
107 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in CheckReturn()
108 MVT VT = Outs[i].VT; in CheckReturn()
109 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn()
118 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn() argument
121 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in AnalyzeReturn()
122 MVT VT = Outs[i].VT; in AnalyzeReturn()
123 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn()
131 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
133 unsigned NumOps = Outs.size(); in AnalyzeCallOperands()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h65 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
69 for (unsigned i = 0; i < Outs.size(); ++i) in AnalyzeCallOperands()
70 ArgIsFixed.push_back(Outs[i].IsFixed); in AnalyzeCallOperands()
73 for (unsigned i = 0; i < Outs.size(); ++i) in AnalyzeCallOperands()
74 ArgIsShortVector.push_back(IsShortVectorType(Outs[i].ArgVT)); in AnalyzeCallOperands()
76 CCState::AnalyzeCallOperands(Outs, Fn); in AnalyzeCallOperands()
81 void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h294 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
300 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
305 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
315 void AnalyzeArguments(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeArguments() argument
317 AnalyzeCallOperands(Outs, Fn); in AnalyzeArguments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h144 const SmallVectorImpl<ISD::OutputArg> &Outs,
174 const SmallVectorImpl<ISD::OutputArg> &Outs,
178 const SmallVectorImpl<ISD::OutputArg> &Outs,
H A DMSP430ISelLowering.cpp441 const SmallVectorImpl<ISD::OutputArg> &Outs) { in AnalyzeVarArgs() argument
442 State.AnalyzeCallOperands(Outs, CC_MSP430_AssignStack); in AnalyzeVarArgs()
555 const SmallVectorImpl<ISD::OutputArg> &Outs) { in AnalyzeRetResult() argument
556 State.AnalyzeReturn(Outs, RetCC_MSP430); in AnalyzeRetResult()
589 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
608 Outs, OutVals, Ins, dl, DAG, InVals); in LowerCall()
726 const SmallVectorImpl<ISD::OutputArg> &Outs, in CanLowerReturn() argument
730 return CCInfo.CheckReturn(Outs, RetCC_MSP430); in CanLowerReturn()
736 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
746 if (CallConv == CallingConv::MSP430_INTR && !Outs.empty()) in LowerReturn()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcISelLowering.h144 const SmallVectorImpl<ISD::OutputArg> &Outs,
149 const SmallVectorImpl<ISD::OutputArg> &Outs,
154 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.h116 const SmallVectorImpl<ISD::OutputArg> &Outs,
144 const SmallVectorImpl<ISD::OutputArg> &Outs,
H A DLanaiISelLowering.cpp413 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
428 return LowerCCCCallTo(Chain, Callee, CallConv, IsVarArg, IsTailCall, Outs, in LowerCall()
536 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
547 CCInfo.AnalyzeReturn(Outs, RetCC_Lanai32); in LowerReturn()
598 bool /*IsTailCall*/, const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerCCCCallTo() argument
616 CCInfo.AnalyzeCallOperands(Outs, CC_Lanai32_VarArg); in LowerCCCCallTo()
619 CCInfo.AnalyzeCallOperands(Outs, CC_Lanai32_Fast); in LowerCCCCallTo()
621 CCInfo.AnalyzeCallOperands(Outs, CC_Lanai32); in LowerCCCCallTo()
629 for (unsigned I = 0, E = Outs.size(); I != E; ++I) { in LowerCCCCallTo()
630 ISD::ArgFlagsTy Flags = Outs[I].Flags; in LowerCCCCallTo()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp226 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
241 CCInfo.AnalyzeCallOperands(Outs, CC_ARC); in LowerCall()
595 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const { in CanLowerReturn() argument
598 if (!CCInfo.CheckReturn(Outs, RetCC_ARC)) in CanLowerReturn()
608 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
626 CCInfo.AnalyzeReturn(Outs, RetCC_ARC); in LowerReturn()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp893 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
899 if (CallConv == CallingConv::WASM_EmscriptenInvoke && Outs.size() >= 2 && in LowerCall()
900 Outs[0].Flags.isSRet()) { in LowerCall()
901 std::swap(Outs[0], Outs[1]); in LowerCall()
908 for (unsigned I = 0; I < Outs.size(); ++I) { in LowerCall()
909 const ISD::OutputArg &Out = Outs[I]; in LowerCall()
951 CLI.Outs.push_back(Arg); in LowerCall()
959 CLI.Outs.push_back(Arg); in LowerCall()
972 for (unsigned I = NumFixedArgs; I < Outs.size(); ++I) { in LowerCall()
973 const ISD::OutputArg &Out = Outs[I]; in LowerCall()
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H A DWebAssemblyISelLowering.h84 const SmallVectorImpl<ISD::OutputArg> &Outs,
87 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp371 auto &Outs = CLI.Outs; in LowerCall() local
396 CCInfo.AnalyzeCallOperands(Outs, getHasAlu32() ? CC_BPF32 : CC_BPF64); in LowerCall()
400 if (Outs.size() > MaxArgs) in LowerCall()
403 for (auto &Arg : Outs) { in LowerCall()
502 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
520 CCInfo.AnalyzeReturn(Outs, getHasAlu32() ? RetCC_BPF32 : RetCC_BPF64); in LowerReturn()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
H A DCallLowering.h460 bool checkReturn(CCState &CCInfo, SmallVectorImpl<BaseArgInfo> &Outs,
466 SmallVectorImpl<BaseArgInfo> &Outs,
478 SmallVectorImpl<BaseArgInfo> &Outs, in canLowerReturn() argument
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
H A DAVRISelLowering.h165 const SmallVectorImpl<ISD::OutputArg> &Outs,
169 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp181 callIsStructReturn(const SmallVectorImpl<ISD::OutputArg> &Outs) { in callIsStructReturn() argument
182 if (Outs.empty()) in callIsStructReturn()
185 const ISD::ArgFlagsTy &Flags = Outs[0].Flags; in callIsStructReturn()
471 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
481 StructReturnType SR = callIsStructReturn(Outs); in LowerCall()
505 MF.getFunction().hasStructRetAttr(), CLI.RetTy, Outs, OutVals, Ins, in LowerCall()
526 CCInfo.AnalyzeCallOperands(Outs, CC_M68k); in LowerCall()
558 if (!Outs.empty() && Outs.back().Flags.isInAlloca()) { in LowerCall()
585 ISD::ArgFlagsTy Flags = Outs[i].Flags; in LowerCall()
675 ISD::ArgFlagsTy Flags = Outs[i].Flags; in LowerCall()
[all …]
H A DM68kISelLowering.h241 const SmallVectorImpl<ISD::OutputArg> &Outs,
268 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h154 const SmallVectorImpl<ISD::OutputArg> &Outs,
221 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h420 const SmallVectorImpl<ISD::OutputArg> &Outs,
423 const SmallVectorImpl<ISD::OutputArg> &Outs,
488 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp869 SmallVectorImpl<BaseArgInfo> &Outs, in checkReturn() argument
871 for (unsigned I = 0, E = Outs.size(); I < E; ++I) { in checkReturn()
872 MVT VT = MVT::getVT(Outs[I].Ty); in checkReturn()
873 if (Fn(I, VT, VT, CCValAssign::Full, Outs[I].Flags[0], CCInfo)) in checkReturn()
881 SmallVectorImpl<BaseArgInfo> &Outs, in getReturnInfo() argument
897 Outs.emplace_back(PartTy, Flags); in getReturnInfo()

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