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Searched refs:OutputArg (Results 1 – 25 of 61) sorted by relevance

123

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsCCState.h37 void PreAnalyzeReturnForF128(const SmallVectorImpl<ISD::OutputArg> &Outs);
42 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
59 PreAnalyzeReturnForVectorFloat(const SmallVectorImpl<ISD::OutputArg> &Outs);
89 AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
104 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
130 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn()
140 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags, in CheckReturn()
H A DMipsCCState.cpp99 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForF128()
121 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForVectorFloat()
123 ISD::OutputArg Out = Outs[i]; in PreAnalyzeReturnForVectorFloat()
132 const SmallVectorImpl<ISD::OutputArg> &Outs, in PreAnalyzeCallOperands()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetCallingConv.h233 struct OutputArg { struct
249 OutputArg() = default; argument
250 OutputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool isfixed, in OutputArg() function
H A DCallingConvLower.h294 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
300 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
305 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
315 void AnalyzeArguments(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeArguments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCCCState.h23 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs);
57 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
H A DPPCCCState.cpp17 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeCallOperands()
H A DPPCISelLowering.h1178 bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs,
1261 const SmallVectorImpl<ISD::OutputArg> &Outs,
1265 const SmallVectorImpl<ISD::OutputArg> &Outs,
1292 const SmallVectorImpl<ISD::OutputArg> &Outs,
1299 const SmallVectorImpl<ISD::OutputArg> &Outs,
1306 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h144 const SmallVectorImpl<ISD::OutputArg> &Outs,
174 const SmallVectorImpl<ISD::OutputArg> &Outs,
178 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcISelLowering.h144 const SmallVectorImpl<ISD::OutputArg> &Outs,
149 const SmallVectorImpl<ISD::OutputArg> &Outs,
154 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h154 const SmallVectorImpl<ISD::OutputArg> &Outs,
221 const SmallVectorImpl<ISD::OutputArg> &Outs,
228 const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
H A DARCISelLowering.h105 const SmallVectorImpl<ISD::OutputArg> &Outs,
111 const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.h116 const SmallVectorImpl<ISD::OutputArg> &Outs,
144 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DCallingConvLower.cpp104 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in CheckReturn()
118 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn()
131 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.h84 const SmallVectorImpl<ISD::OutputArg> &Outs,
87 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
H A DAVRISelLowering.h165 const SmallVectorImpl<ISD::OutputArg> &Outs,
169 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVEISelLowering.h83 const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
86 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kISelLowering.h241 const SmallVectorImpl<ISD::OutputArg> &Outs,
268 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h420 const SmallVectorImpl<ISD::OutputArg> &Outs,
423 const SmallVectorImpl<ISD::OutputArg> &Outs,
488 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.h493 const SmallVectorImpl<ISD::OutputArg> &,
498 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h124 bool isCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs,
228 const SmallVectorImpl<ISD::OutputArg> &Outs,
232 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.h328 const SmallVectorImpl<ISD::OutputArg> &Outs,
332 const SmallVectorImpl<ISD::OutputArg> &Outs,
355 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFISelLowering.h101 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h65 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
H A DSystemZISelLowering.h530 const SmallVectorImpl<ISD::OutputArg> &Outs,
533 const SmallVectorImpl<ISD::OutputArg> &Outs,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMISelLowering.h903 const SmallVectorImpl<ISD::OutputArg> &Outs,
910 const SmallVectorImpl<ISD::OutputArg> &Outs,
914 const SmallVectorImpl<ISD::OutputArg> &Outs,

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