| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRISelDAGToDAG.cpp | 44 std::vector<SDValue> &OutOps) override;
204 std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
220 OutOps.push_back(Op); in SelectInlineAsmMemoryOperand()
228 OutOps.push_back(Base); in SelectInlineAsmMemoryOperand()
229 OutOps.push_back(Disp); in SelectInlineAsmMemoryOperand()
284 OutOps.push_back(Base); in SelectInlineAsmMemoryOperand()
285 OutOps.push_back(Disp); in SelectInlineAsmMemoryOperand()
300 OutOps.push_back(CopyFromReg); in SelectInlineAsmMemoryOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 1351 std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
1361 OutOps.push_back(Base); in SelectInlineAsmMemoryOperand()
1362 OutOps.push_back(Offset); in SelectInlineAsmMemoryOperand()
1365 OutOps.push_back(Op); in SelectInlineAsmMemoryOperand()
1366 OutOps.push_back(CurDAG->getTargetConstant(0, SDLoc(Op), MVT::i32)); in SelectInlineAsmMemoryOperand()
1375 OutOps.push_back(Base); in SelectInlineAsmMemoryOperand()
1376 OutOps.push_back(Offset); in SelectInlineAsmMemoryOperand()
1379 OutOps.push_back(Op); in SelectInlineAsmMemoryOperand()
1380 OutOps.push_back(CurDAG->getTargetConstant(0, SDLoc(Op), MVT::i32)); in SelectInlineAsmMemoryOperand()
1388 OutOps.push_back(Base); in SelectInlineAsmMemoryOperand()
[all …]
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| H A D | MipsISelDAGToDAG.cpp | 312 std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
320 OutOps.push_back(Op); in SelectInlineAsmMemoryOperand()
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| H A D | MipsISelDAGToDAG.h | 146 std::vector<SDValue> &OutOps) override;
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| H A D | MipsSEISelDAGToDAG.h | 139 std::vector<SDValue> &OutOps) override;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelDAGToDAG.cpp | 63 std::vector<SDValue> &OutOps) override;
252 const SDValue &Op, unsigned ConstraintCode, std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
264 OutOps.push_back(Op0); in SelectInlineAsmMemoryOperand()
265 OutOps.push_back(Op1); in SelectInlineAsmMemoryOperand()
266 OutOps.push_back(AluOp); in SelectInlineAsmMemoryOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelDAGToDAG.cpp | 62 std::vector<SDValue> &OutOps) override;
199 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
204 OutOps.push_back(Op); in SelectInlineAsmMemoryOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| H A D | XCoreISelDAGToDAG.cpp | 68 std::vector<SDValue> &OutOps) override;
112 std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
127 OutOps.push_back(Reg); in SelectInlineAsmMemoryOperand()
128 OutOps.push_back(Op.getOperand(0)); in SelectInlineAsmMemoryOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BPFISelDAGToDAG.cpp | 64 std::vector<SDValue> &OutOps) override;
161 const SDValue &Op, unsigned ConstraintCode, std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
174 OutOps.push_back(Op0); in SelectInlineAsmMemoryOperand()
175 OutOps.push_back(Op1); in SelectInlineAsmMemoryOperand()
176 OutOps.push_back(AluOp); in SelectInlineAsmMemoryOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcISelDAGToDAG.cpp | 53 std::vector<SDValue> &OutOps) override;
379 std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
390 OutOps.push_back(Op0); in SelectInlineAsmMemoryOperand()
391 OutOps.push_back(Op1); in SelectInlineAsmMemoryOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelDAGToDAG.cpp | 107 std::vector<SDValue> &OutOps) override;
283 std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
293 OutOps.push_back(Op0); in SelectInlineAsmMemoryOperand()
294 OutOps.push_back(Op1); in SelectInlineAsmMemoryOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.h | 53 std::vector<SDValue> &OutOps) override;
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| H A D | NVPTXISelDAGToDAG.cpp | 3692 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
3699 OutOps.push_back(Op0); in SelectInlineAsmMemoryOperand()
3700 OutOps.push_back(CurDAG->getTargetConstant(0, SDLoc(Op), MVT::i32)); in SelectInlineAsmMemoryOperand()
3704 OutOps.push_back(Op0); in SelectInlineAsmMemoryOperand()
3705 OutOps.push_back(Op1); in SelectInlineAsmMemoryOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.h | 44 std::vector<SDValue> &OutOps) override;
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| H A D | RISCVISelDAGToDAG.cpp | 1185 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
1190 OutOps.push_back(Op); in SelectInlineAsmMemoryOperand()
1193 OutOps.push_back(Op); in SelectInlineAsmMemoryOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.h | 89 std::vector<SDValue> &OutOps) override;
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| H A D | HexagonISelDAGToDAG.cpp | 920 std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
930 OutOps.push_back(Res); in SelectInlineAsmMemoryOperand()
932 OutOps.push_back(Inp); in SelectInlineAsmMemoryOperand()
936 OutOps.push_back(CurDAG->getTargetConstant(0, SDLoc(Op), MVT::i32)); in SelectInlineAsmMemoryOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGISel.h | 93 std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 373 std::vector<SDValue> &OutOps) override;
1677 std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
1737 OutOps.push_back(Base); in SelectInlineAsmMemoryOperand()
1738 OutOps.push_back(Disp); in SelectInlineAsmMemoryOperand()
1739 OutOps.push_back(Index); in SelectInlineAsmMemoryOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 261 std::vector<SDValue> &OutOps) override;
5973 std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
5987 OutOps.push_back(Op0); in SelectInlineAsmMemoryOperand()
5988 OutOps.push_back(Op1); in SelectInlineAsmMemoryOperand()
5989 OutOps.push_back(Op2); in SelectInlineAsmMemoryOperand()
5990 OutOps.push_back(Op3); in SelectInlineAsmMemoryOperand()
5991 OutOps.push_back(Op4); in SelectInlineAsmMemoryOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 64 std::vector<SDValue> &OutOps) override;
369 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
386 OutOps.push_back(NewOp); in SelectInlineAsmMemoryOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 321 std::vector<SDValue> &OutOps) override;
5617 std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
5634 OutOps.push_back(Op); in SelectInlineAsmMemoryOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 8744 SDValue OutOps[] = { OutLo, OutHi }; in LowerSHL_PARTS() local
8745 return DAG.getMergeValues(OutOps, dl); in LowerSHL_PARTS()
8773 SDValue OutOps[] = { OutLo, OutHi }; in LowerSRL_PARTS() local
8774 return DAG.getMergeValues(OutOps, dl); in LowerSRL_PARTS()
8802 SDValue OutOps[] = { OutLo, OutHi }; in LowerSRA_PARTS() local
8803 return DAG.getMergeValues(OutOps, dl); in LowerSRA_PARTS()
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| H A D | PPCISelDAGToDAG.cpp | 366 std::vector<SDValue> &OutOps) override { in SelectInlineAsmMemoryOperand() argument
388 OutOps.push_back(NewOp); in SelectInlineAsmMemoryOperand()
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 13423 Value *OutOps[2]; in EmitX86BuiltinExpr() local
13428 OutOps[l] = llvm::ConstantAggregateZero::get(Ops[0]->getType()); in EmitX86BuiltinExpr()
13430 OutOps[l] = Ops[1]; in EmitX86BuiltinExpr()
13432 OutOps[l] = Ops[0]; in EmitX86BuiltinExpr()
13445 return Builder.CreateShuffleVector(OutOps[0], OutOps[1], in EmitX86BuiltinExpr()
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