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Searched refs:OrigVT (Results 1 – 13 of 13) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp54 static void applyStackPassedSmallTypeDAGHack(EVT OrigVT, MVT &ValVT, in applyStackPassedSmallTypeDAGHack() argument
62 if (OrigVT == MVT::i1 || OrigVT == MVT::i8) in applyStackPassedSmallTypeDAGHack()
64 else if (OrigVT == MVT::i16) in applyStackPassedSmallTypeDAGHack()
83 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
87 applyStackPassedSmallTypeDAGHack(OrigVT, ValVT, LocVT); in assignArg()
88 return IncomingValueAssigner::assignArg(ValNo, OrigVT, ValVT, LocVT, in assignArg()
109 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
117 applyStackPassedSmallTypeDAGHack(OrigVT, ValVT, LocVT); in assignArg()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
H A DCallLowering.h172 virtual bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetLowering.h2248 void AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in AddPromotedToType() argument
2249 PromoteToType[std::make_pair(Opc, OrigVT.SimpleTy)] = DestVT.SimpleTy; in AddPromotedToType()
2254 void setOperationPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in setOperationPromotedToType() argument
2255 setOperationAction(Opc, OrigVT, Promote); in setOperationPromotedToType()
2256 AddPromotedToType(Opc, OrigVT, DestVT); in setOperationPromotedToType()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86CallLowering.cpp67 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
H A DX86ISelLowering.cpp30168 MVT OrigVT = VT; in LowerMGATHER() local
30191 SDValue Extract = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OrigVT, in LowerMGATHER()
47020 EVT OrigVT = N->getValueType(0); in combineFneg() local
47042 return DAG.getBitcast(OrigVT, NewNode); in combineFneg()
47049 return DAG.getBitcast(OrigVT, NegArg); in combineFneg()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp640 const EVT OrigVT = EVT::getEVT(Args[i].Ty); in handleAssignments() local
752 if (Handler.isIncomingArgumentHandler() && OrigVT != LocVT) { in handleAssignments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp4559 EVT OrigVT = Op.getOperand(0).getValueType(); in IsMulWideOperandDemotable() local
4560 if (OrigVT.getFixedSizeInBits() <= OptSize) { in IsMulWideOperandDemotable()
4565 EVT OrigVT = Op.getOperand(0).getValueType(); in IsMulWideOperandDemotable() local
4566 if (OrigVT.getFixedSizeInBits() <= OptSize) { in IsMulWideOperandDemotable()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp5066 EVT OrigVT = N->getOperand(0).getValueType(); in WidenVecOp_VECREDUCE() local
5068 EVT ElemVT = OrigVT.getVectorElementType(); in WidenVecOp_VECREDUCE()
5077 unsigned OrigElts = OrigVT.getVectorNumElements(); in WidenVecOp_VECREDUCE()
5092 EVT OrigVT = VecOp.getValueType(); in WidenVecOp_VECREDUCE_SEQ() local
5094 EVT ElemVT = OrigVT.getVectorElementType(); in WidenVecOp_VECREDUCE_SEQ()
5102 unsigned OrigElts = OrigVT.getVectorNumElements(); in WidenVecOp_VECREDUCE_SEQ()
H A DLegalizeDAG.cpp305 EVT OrigVT = VT; in ExpandConstantFP() local
316 TLI.isLoadExtLegal(ISD::EXTLOAD, OrigVT, SVT) && in ExpandConstantFP()
317 TLI.ShouldShrinkFPConstant(OrigVT)) { in ExpandConstantFP()
331 ISD::EXTLOAD, dl, OrigVT, DAG.getEntryNode(), CPIdx, in ExpandConstantFP()
337 OrigVT, dl, DAG.getEntryNode(), CPIdx, in ExpandConstantFP()
H A DDAGCombiner.cpp10520 EVT OrigVT = N->getOperand(0).getValueType(); in CombineZExtLogicopShiftLoad() local
10521 if (TLI.isZExtFree(OrigVT, VT)) in CombineZExtLogicopShiftLoad()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp3830 static Align CalculateStackSlotAlignment(EVT ArgVT, EVT OrigVT, in CalculateStackSlotAlignment() argument
3859 if (Flags.isSplit() && OrigVT != MVT::ppcf128) in CalculateStackSlotAlignment()
3860 Alignment = Align(OrigVT.getStoreSize()); in CalculateStackSlotAlignment()
3872 static bool CalculateStackSlotUsed(EVT ArgVT, EVT OrigVT, ISD::ArgFlagsTy Flags, in CalculateStackSlotUsed() argument
3881 CalculateStackSlotAlignment(ArgVT, OrigVT, Flags, PtrByteSize); in CalculateStackSlotUsed()
4275 EVT OrigVT = Ins[ArgNo].ArgVT; in LowerFormalArguments_64SVR4() local
4291 CalculateStackSlotAlignment(ObjectVT, OrigVT, Flags, PtrByteSize); in LowerFormalArguments_64SVR4()
5975 EVT OrigVT = Outs[i].ArgVT; in LowerCall_64SVR4() local
6020 CalculateStackSlotAlignment(ArgVT, OrigVT, Flags, PtrByteSize); in LowerCall_64SVR4()
6089 EVT OrigVT = Outs[i].ArgVT; in LowerCall_64SVR4() local
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp3481 static EVT getExtensionTo64Bits(const EVT &OrigVT) { in getExtensionTo64Bits() argument
3482 if (OrigVT.getSizeInBits() >= 64) in getExtensionTo64Bits()
3483 return OrigVT; in getExtensionTo64Bits()
3485 assert(OrigVT.isSimple() && "Expecting a simple value type"); in getExtensionTo64Bits()
3487 MVT::SimpleValueType OrigSimpleTy = OrigVT.getSimpleVT().SimpleTy; in getExtensionTo64Bits()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp8845 static EVT getExtensionTo64Bits(const EVT &OrigVT) { in getExtensionTo64Bits() argument
8846 if (OrigVT.getSizeInBits() >= 64) in getExtensionTo64Bits()
8847 return OrigVT; in getExtensionTo64Bits()
8849 assert(OrigVT.isSimple() && "Expecting a simple value type"); in getExtensionTo64Bits()
8851 MVT::SimpleValueType OrigSimpleTy = OrigVT.getSimpleVT().SimpleTy; in getExtensionTo64Bits()