Home
last modified time | relevance | path

Searched refs:Order (Results 1 – 25 of 244) sorted by relevance

12345678910

/netbsd-src/external/apache2/llvm/dist/libcxx/benchmarks/
H A Dalgorithms.bench.cpp35 enum class Order { enum
43 struct AllOrders : EnumValuesAsTuple<AllOrders, Order, 6> {
50 void fillValues(std::vector<T>& V, size_t N, Order O) { in fillValues()
51 if (O == Order::SingleElement) { in fillValues()
60 void fillValues(std::vector<std::pair<T, T> >& V, size_t N, Order O) { in fillValues()
61 if (O == Order::SingleElement) { in fillValues()
75 void fillValues(std::vector<std::tuple<T1, T2, T3> >& V, size_t N, Order O) { in fillValues()
76 if (O == Order::SingleElement) { in fillValues()
96 void fillValues(std::vector<std::string>& V, size_t N, Order O) { in fillValues()
97 if (O == Order::SingleElement) { in fillValues()
[all …]
H A Dmap.bench.cpp45 enum class Order { Sorted, Random }; enum
46 struct AllOrders : EnumValuesAsTuple<AllOrders, Order, 2> {
236 template <class Mode, class Order>
243 Order::value == ::Order::Random ? Shuffle::Keys : Shuffle::None, 1000); in run()
264 Order::value == ::Order::Random ? Shuffle::Keys in run()
272 return "BM_Insert" + baseName() + Mode::name() + Order::name(); in name()
355 template <class Mode, class Order>
362 Order::value == ::Order::Random ? Shuffle::Keys : Shuffle::None, 1000); in run()
383 Order::value == ::Order::Random ? Shuffle::Keys in run()
391 return "BM_InsertAssign" + baseName() + Mode::name() + Order::name(); in name()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DAllocationOrder.h32 ArrayRef<MCPhysReg> Order; variable
59 return AO.Order[Pos];
67 while (Pos >= 0 && Pos < AO.IterationLimit && AO.isHint(AO.Order[Pos]))
90 AllocationOrder(SmallVector<MCPhysReg, 16> &&Hints, ArrayRef<MCPhysReg> Order, in AllocationOrder() argument
92 : Hints(std::move(Hints)), Order(Order), in AllocationOrder()
93 IterationLimit(HardHints ? 0 : static_cast<int>(Order.size())) {} in AllocationOrder()
102 assert(OrderLimit <= Order.size()); in getOrderLimitEnd()
111 ArrayRef<MCPhysReg> getOrder() const { return Order; } in getOrder()
H A DRegAllocGreedy.cpp461 const AllocationOrder &Order);
464 const AllocationOrder &Order);
466 const AllocationOrder &Order,
478 MCRegister getCheapestEvicteeWeight(const AllocationOrder &Order,
498 AllocationOrder &Order,
509 AllocationOrder &Order, MCRegister PhysReg,
800 AllocationOrder &Order, in tryAssign() argument
804 for (auto I = Order.begin(), E = Order.end(); I != E && !PhysReg; ++I) { in tryAssign()
821 if (Order.isHint(Hint)) { in tryAssign()
845 MCRegister CheapReg = tryEvict(VirtReg, Order, NewVRegs, Cost, FixedRegisters); in tryAssign()
[all …]
H A DAllocationOrder.cpp34 auto Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg)); in create() local
37 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM, Matrix); in create()
49 assert(is_contained(Order, Hints[I]) && in create()
52 return AllocationOrder(std::move(Hints), Order, HardHints); in create()
H A DRegisterClassInfo.cpp100 if (!RCI.Order) in compute()
101 RCI.Order.reset(new MCPhysReg[NumRegs]); in compute()
127 RCI.Order[N++] = PhysReg; in compute()
140 RCI.Order[N++] = PhysReg; in compute()
160 dbgs() << ' ' << printReg(RCI.Order[I], TRI); in compute()
H A DLocalStackSlotAllocation.cpp59 unsigned Order; member in __anon63de47a80111::FrameRef
63 MI(I), LocalOffset(Offset), FrameIdx(Idx), Order(Ord) {} in FrameRef()
66 return std::tie(LocalOffset, FrameIdx, Order) < in operator <()
67 std::tie(RHS.LocalOffset, RHS.FrameIdx, RHS.Order); in operator <()
302 unsigned Order = 0; in insertFrameReferenceRegisters() local
330 FrameReferenceInsns.push_back(FrameRef(&MI, LocalOffset, Idx, Order++)); in insertFrameReferenceRegisters()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Support/
H A DDynamicLibrary.cpp74 void *LibLookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { in LibLookup() argument
75 if (Order & SO_LoadOrder) { in LibLookup()
89 void *Lookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { in Lookup() argument
90 assert(!((Order & SO_LoadedFirst) && (Order & SO_LoadedLast)) && in Lookup()
93 if (!Process || (Order & SO_LoadedFirst)) { in Lookup()
94 if (void *Ptr = LibLookup(Symbol, Order)) in Lookup()
103 if (Order & SO_LoadedLast) { in Lookup()
104 if (void *Ptr = LibLookup(Symbol, Order)) in Lookup()
/netbsd-src/external/gpl3/gcc/dist/libphobos/src/std/digest/
H A Dpackage.d546 char[digestLength!(Hash)*2] hexDigest(Hash, Order order = Order.increasing, Range)(ref Range range)
568 char[digestLength!(Hash)*2] hexDigest(Hash, Order order = Order.increasing, T...)(scope const T dat…
578 …assert(hexDigest!(CRC32, Order.decreasing)("The quick brown fox jumps over the lazy dog") == "414F…
584 …assert(hexDigest!(CRC32, Order.decreasing)("The quick ", "brown ", "fox jumps over the lazy dog") …
734 enum Order : bool
746 assert(crc32.toHexString!(Order.decreasing) == "414FA339");
747 assert(crc32.toHexString!(LetterCase.lower, Order.decreasing) == "414fa339");
768 char[num*2] toHexString(Order order = Order.increasing, size_t num, LetterCase letterCase = LetterC…
779 char[num*2] toHexString(LetterCase letterCase, Order order = Order.increasing, size_t num)(in ubyte…
785 string toHexString(Order order = Order.increasing, LetterCase letterCase = LetterCase.upper)
[all …]
/netbsd-src/external/gpl3/gcc.old/dist/libphobos/src/std/digest/
H A Dpackage.d495 char[digestLength!(Hash)*2] hexDigest(Hash, Order order = Order.increasing, Range)(ref Range range)
517 char[digestLength!(Hash)*2] hexDigest(Hash, Order order = Order.increasing, T...)(scope const T dat…
527 …assert(hexDigest!(CRC32, Order.decreasing)("The quick brown fox jumps over the lazy dog") == "414F…
533 …assert(hexDigest!(CRC32, Order.decreasing)("The quick ", "brown ", "fox jumps over the lazy dog") …
683 enum Order : bool
707 char[num*2] toHexString(Order order = Order.increasing, size_t num, LetterCase letterCase = LetterC…
723 static if (order == Order.increasing)
745 char[num*2] toHexString(LetterCase letterCase, Order order = Order.increasing, size_t num)(in ubyte…
751 string toHexString(Order order = Order.increasing, LetterCase letterCase = LetterCase.upper)
766 static if (order == Order.increasing)
[all …]
H A Ddigest.d15 alias Order = _newDigest.Order; variable
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h708 void setIROrder(unsigned Order) { IROrder = Order; }
1056 SDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs)
1058 IROrder(Order), debugLoc(std::move(dl)) {
1087 SDLoc(const Instruction *I, int Order) : IROrder(Order) {
1088 assert(Order >= 0 && "bad IROrder");
1234 AddrSpaceCastSDNode(unsigned Order, const DebugLoc &dl, EVT VT,
1256 MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTs,
1396 AtomicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTL,
1398 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1450 MemIntrinsicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl,
[all …]
H A DScheduleDAG.h56 Order ///< Any other ordering dependency. enumerator
124 : Dep(S, Order), Contents(), Latency(0) { in SDep()
169 return getKind() == Order && (Contents.OrdKind == MayAliasMem in isNormalMemory()
175 return getKind() == Order && Contents.OrdKind == Barrier; in isBarrier()
187 return getKind() == Order && Contents.OrdKind == MustAliasMem; in isMustAlias()
195 return getKind() == Order && Contents.OrdKind >= Weak; in isWeak()
201 return getKind() == Order && Contents.OrdKind == Artificial; in isArtificial()
207 return getKind() == Order && Contents.OrdKind == Cluster; in isCluster()
473 case Order: in overlaps()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
H A DStructurizeCFG.cpp251 SmallVector<RegionNode *, 8> Order; member in __anondb40fec20111::StructurizeCFG
373 Order.resize(std::distance(GraphTraits<Region *>::nodes_begin(ParentRegion), in INITIALIZE_PASS_DEPENDENCY()
375 if (Order.empty()) in INITIALIZE_PASS_DEPENDENCY()
383 unsigned I = 0, E = Order.size(); in INITIALIZE_PASS_DEPENDENCY()
402 Order[I++] = N.first; in INITIALIZE_PASS_DEPENDENCY()
417 Nodes.insert(Order.begin() + I, Order.begin() + E - 1); in INITIALIZE_PASS_DEPENDENCY()
420 EntryNode.first = Order[E - 1]; in INITIALIZE_PASS_DEPENDENCY()
527 for (RegionNode *RN : reverse(Order)) { in collectInfos()
735 BasicBlock *Insert = Order.empty() ? ParentRegion->getExit() : in getNextFlow()
736 Order.back()->getEntry(); in getNextFlow()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DSDNodeDbgValue.h148 unsigned Order; variable
162 Var(Var), Expr(Expr), DL(DL), Order(O), IsIndirect(IsIndirect), in SDDbgValue()
218 unsigned getOrder() const { return Order; } in getOrder()
244 unsigned Order; variable
248 : Label(Label), DL(std::move(dl)), Order(O) {} in SDDbgLabel()
258 unsigned getOrder() const { return Order; } in getOrder()
H A DScheduleDAGSDNodes.cpp738 DenseMap<SDValue, Register> &VRBaseMap, unsigned Order) { in ProcessSDDbgValues() argument
761 if (Order != 0 && DVOrder != Order) in ProcessSDDbgValues()
786 unsigned Order = N->getIROrder(); in ProcessSourceNode() local
787 if (!Order || Seen.count(Order)) { in ProcessSourceNode()
799 Seen.insert(Order); in ProcessSourceNode()
800 Orders.push_back({Order, NewInsn}); in ProcessSourceNode()
805 ProcessSDDbgValues(N, DAG, Emitter, Orders, VRBaseMap, Order); in ProcessSourceNode()
979 unsigned Order = Orders[i].first; in EmitSchedule() local
984 if ((*DI)->getOrder() < LastOrder || (*DI)->getOrder() >= Order) in EmitSchedule()
1002 LastOrder = Order; in EmitSchedule()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-profgen/
H A DCSPreInliner.cpp44 std::vector<StringRef> Order; in buildTopDownOrder() local
53 Order.push_back(Node->Name); in buildTopDownOrder()
57 std::reverse(Order.begin(), Order.end()); in buildTopDownOrder()
59 return Order; in buildTopDownOrder()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64GenRegisterBankInfo.def147 ArrayRef<PartialMappingIdx> Order) {
148 if (Order.front() != FirstAlias)
150 if (Order.back() != LastAlias)
152 if (Order.front() > Order.back())
155 PartialMappingIdx Previous = Order.front();
157 for (const auto &Current : Order) {
/netbsd-src/usr.sbin/ypserv/yptest/
H A Dyptest.c54 int KeyLen, ValLen, Status, Order; in main() local
104 Status = yp_order(Domain, Map, &Order); in main()
106 printf("%d\n", Order); in main()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp57 static void addHints(ArrayRef<MCPhysReg> Order, in addHints() argument
64 for (MCPhysReg Reg : Order) in addHints()
68 for (MCPhysReg Reg : Order) in addHints()
75 Register VirtReg, ArrayRef<MCPhysReg> Order, in getRegAllocationHints() argument
83 VirtReg, Order, Hints, MF, VRM, Matrix); in getRegAllocationHints()
127 for (MCPhysReg OrderReg : Order) in getRegAllocationHints()
157 addHints(Order, Hints, RC, MRI); in getRegAllocationHints()
178 addHints(Order, Hints, &SystemZ::GR32BitRegClass, MRI); in getRegAllocationHints()
/netbsd-src/games/mille/
H A Dvarpush.c59 { (void *) &Order, sizeof Order }, in varpush()
/netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/
H A DCGAtomic.cpp515 uint64_t Size, llvm::AtomicOrdering Order, in EmitAtomicOp() argument
529 FailureOrder, Size, Order, Scope); in EmitAtomicOp()
534 FailureOrder, Size, Order, Scope); in EmitAtomicOp()
540 Val1, Val2, FailureOrder, Size, Order, Scope); in EmitAtomicOp()
554 FailureOrder, Size, Order, Scope); in EmitAtomicOp()
559 FailureOrder, Size, Order, Scope); in EmitAtomicOp()
571 Load->setAtomic(Order, Scope); in EmitAtomicOp()
583 Store->setAtomic(Order, Scope); in EmitAtomicOp()
674 CGF.Builder.CreateAtomicRMW(Op, Ptr.getPointer(), LoadVal1, Order, Scope); in EmitAtomicOp()
705 uint64_t Size, llvm::AtomicOrdering Order, in EmitAtomicOp() argument
[all …]
/netbsd-src/external/gpl3/binutils.old/dist/zlib/qnx/
H A Dpackage.qpg117 <QPM:Order>InstallOver</QPM:Order>
131 <QPM:Order>InstallOver</QPM:Order>
/netbsd-src/external/gpl3/binutils/dist/zlib/qnx/
H A Dpackage.qpg117 <QPM:Order>InstallOver</QPM:Order>
131 <QPM:Order>InstallOver</QPM:Order>
/netbsd-src/external/gpl3/gdb/dist/zlib/qnx/
H A Dpackage.qpg117 <QPM:Order>InstallOver</QPM:Order>
131 <QPM:Order>InstallOver</QPM:Order>

12345678910