| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMHazardRecognizer.cpp | 203 int64_t Offset1 = 0; in getHazardType() local 209 Ptr1 = GetPointerBaseWithConstantOffset(BaseVal1, Offset1, DL, true); in getHazardType() 211 return CheckOffsets(Offset0, Offset1); in getHazardType() 221 Offset1 = MF.getFrameInfo().getObjectOffset(FS1->getFrameIndex()); in getHazardType() 222 return CheckOffsets(Offset0, Offset1); in getHazardType()
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| H A D | ARMBaseInstrInfo.h | 247 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, 259 int64_t Offset1, int64_t Offset2,
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| H A D | ARMBaseInstrInfo.cpp | 1925 int64_t &Offset1, in areLoadsFromSameBasePtr() argument 1986 Offset1 = cast<ConstantSDNode>(Load1->getOperand(1))->getSExtValue(); in areLoadsFromSameBasePtr() 2006 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument 2011 assert(Offset2 > Offset1); in shouldScheduleLoadsNear() 2013 if ((Offset2 - Offset1) / 8 > 64) in shouldScheduleLoadsNear()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| H A D | ConstraintElimination.cpp | 131 int64_t Offset1 = 0; in getConstraint() local 179 Offset1 = ADec[0].first; in getConstraint() 181 Offset1 *= -1; in getConstraint() 201 R[0] = Offset1 + Offset2 + (Pred == CmpInst::ICMP_ULT ? -1 : 0); in getConstraint()
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| H A D | SeparateConstOffsetFromGEP.cpp | 1351 Value *Offset1 = First->getOperand(1); in swapGEPOperand() local 1354 Second->setOperand(1, Offset1); in swapGEPOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 243 int64_t Offset1, Offset2; in ClusterNeighboringLoads() local 244 if (!TII->areLoadsFromSameBasePtr(Base, User, Offset1, Offset2) || in ClusterNeighboringLoads() 245 Offset1 == Offset2 || in ClusterNeighboringLoads() 251 if (O2SMap.insert(std::make_pair(Offset1, Base)).second) in ClusterNeighboringLoads() 252 Offsets.push_back(Offset1); in ClusterNeighboringLoads() 255 if (Offset2 < Offset1) in ClusterNeighboringLoads()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 180 bool isDSOffset2Legal(SDValue Base, unsigned Offset0, unsigned Offset1, 184 SDValue &Offset1) const; 186 SDValue &Offset1) const; 188 SDValue &Offset1, unsigned Size) const; 1279 unsigned Offset1, in isDSOffset2Legal() argument 1281 if (Offset0 % Size != 0 || Offset1 % Size != 0) in isDSOffset2Legal() 1283 if (!isUInt<8>(Offset0 / Size) || !isUInt<8>(Offset1 / Size)) in isDSOffset2Legal() 1298 SDValue &Offset1) const { in SelectDS64Bit4ByteAligned() 1299 return SelectDSReadWrite2(Addr, Base, Offset0, Offset1, 4); in SelectDS64Bit4ByteAligned() 1304 SDValue &Offset1) const { in SelectDS128Bit8ByteAligned() [all …]
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| H A D | AMDGPUInstructionSelector.h | 217 bool isDSOffset2Legal(Register Base, int64_t Offset0, int64_t Offset1,
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| H A D | SIInstrInfo.h | 185 int64_t &Offset1, 199 int64_t Offset1, unsigned NumLoads) const override;
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| H A D | SIInstrInfo.cpp | 131 int64_t &Offset1) const { in areLoadsFromSameBasePtr() 167 Offset1 = cast<ConstantSDNode>(Load1->getOperand(Offset1Idx))->getZExtValue(); in areLoadsFromSameBasePtr() 192 Offset1 = Load1Offset->getZExtValue(); in areLoadsFromSameBasePtr() 225 Offset1 = cast<ConstantSDNode>(Off1)->getZExtValue(); in areLoadsFromSameBasePtr() 283 unsigned Offset1 = Offset1Op->getImm(); in getMemOperandsWithOffsetWidth() local 284 if (Offset0 + 1 != Offset1) in getMemOperandsWithOffsetWidth() 471 int64_t Offset0, int64_t Offset1, in shouldScheduleLoadsNear() argument 473 assert(Offset1 > Offset0 && in shouldScheduleLoadsNear() 479 return (NumLoads <= 16 && (Offset1 - Offset0) < 64); in shouldScheduleLoadsNear() 2948 int64_t Offset0, Offset1; in checkInstOffsetsDoNotOverlap() local [all …]
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| H A D | AMDGPUInstructionSelector.cpp | 1269 unsigned Offset1 = WaveRelease | (WaveDone << 1) | (ShaderType << 2) | in selectDSOrderedIntrinsic() local 1273 Offset1 |= (CountDw - 1) << 6; in selectDSOrderedIntrinsic() 1275 unsigned Offset = Offset0 | (Offset1 << 8); in selectDSOrderedIntrinsic() 3793 int64_t Offset1, in isDSOffset2Legal() argument 3795 if (Offset0 % Size != 0 || Offset1 % Size != 0) in isDSOffset2Legal() 3797 if (!isUInt<8>(Offset0 / Size) || !isUInt<8>(Offset1 / Size)) in isDSOffset2Legal()
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| H A D | SILoadStoreOptimizer.cpp | 1811 uint64_t Offset1 = Src1->getImm(); in processBaseWithConstOffset() local 1818 Addr.Offset = (*Offset0P & 0x00000000ffffffff) | (Offset1 << 32); in processBaseWithConstOffset()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 360 int64_t Offset1; in apply() local 362 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() 368 if (((Offset0 ^ Offset1) & 0x18) != 0) in apply()
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| H A D | HexagonISelLoweringHVX.cpp | 1757 SDValue Offset1 = DAG.getTargetConstant(HwLen, dl, MVT::i32); in LowerHvxMaskedOp() local 1763 {MaskU.second, Base, Offset1, ValueU.second, Chain}, DAG); in LowerHvxMaskedOp()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MicroMipsSizeReduction.cpp | 400 int64_t Offset1, Offset2; in ConsecutiveInstr() local 401 if (!GetImm(MI1, 2, Offset1)) in ConsecutiveInstr() 409 return ((Offset1 == (Offset2 - 4)) && (ConsecutiveRegisters(Reg1, Reg2))); in ConsecutiveInstr()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 420 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, 438 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1,
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| H A D | X86InstrInfo.cpp | 6549 int64_t &Offset1, int64_t &Offset2) const { in areLoadsFromSameBasePtr() argument 6741 Offset1 = Disp1->getSExtValue(); in areLoadsFromSameBasePtr() 6747 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument 6749 assert(Offset2 > Offset1); in shouldScheduleLoadsNear() 6750 if ((Offset2 - Offset1) / 8 > 64) in shouldScheduleLoadsNear()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 1493 int64_t Offset1 = Const->getSExtValue(); in doPeepholeLoadStoreADDI() local 1494 int64_t CombinedOffset = Offset1 + Offset2; in doPeepholeLoadStoreADDI() 1508 int64_t Offset1 = GA->getOffset(); in doPeepholeLoadStoreADDI() local 1509 int64_t CombinedOffset = Offset1 + Offset2; in doPeepholeLoadStoreADDI() 1518 int64_t Offset1 = CP->getOffset(); in doPeepholeLoadStoreADDI() local 1519 int64_t CombinedOffset = Offset1 + Offset2; in doPeepholeLoadStoreADDI()
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| /netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-profgen/ |
| H A D | ProfiledBinary.cpp | 120 uint64_t Offset1 = virtualAddrToOffset(Address1); in inlineContextEqual() local 122 const FrameLocationStack &Context1 = getFrameLocationStack(Offset1); in inlineContextEqual()
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | ContainerModeling.cpp | 139 SymbolRef Offset1, 973 SymbolRef Offset1, in invalidateIteratorPositions() argument 978 return compare(State, Pos.getOffset(), Offset1, Opc1) && in invalidateIteratorPositions()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1297 int64_t &Offset1, in areLoadsFromSameBasePtr() argument 1311 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 3059 int64_t Offset1, unsigned Opcode1, int FI2, in shouldClusterFI() argument 3076 ObjectOffset1 += Offset1; in shouldClusterFI() 3126 int64_t Offset1 = FirstLdSt.getOperand(2).getImm(); in shouldClusterMemOps() local 3127 if (hasUnscaledLdStOffset(FirstOpc) && !scaleOffset(FirstOpc, Offset1)) in shouldClusterMemOps() 3135 if (Offset1 > 63 || Offset1 < -64) in shouldClusterMemOps() 3141 assert((!BaseOp1.isIdenticalTo(BaseOp2) || Offset1 <= Offset2) && in shouldClusterMemOps() 3146 return shouldClusterFI(MFI, BaseOp1.getIndex(), Offset1, FirstOpc, in shouldClusterMemOps() 3150 assert(Offset1 <= Offset2 && "Caller should have ordered offsets."); in shouldClusterMemOps() 3152 return Offset1 + 1 == Offset2; in shouldClusterMemOps()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachinePipeliner.cpp | 775 int64_t Offset1, Offset2; in addLoopCarriedDependences() local 777 if (TII->getMemOperandWithOffset(LdMI, BaseOp1, Offset1, in addLoopCarriedDependences() 783 (int)Offset1 < (int)Offset2) { in addLoopCarriedDependences()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2827 int64_t Offset1 = 0, Offset2 = 0; in shouldClusterMemOps() local 2830 if (!getMemOperandWithOffsetWidth(FirstLdSt, Base1, Offset1, Width1, TRI) || in shouldClusterMemOps() 2838 assert(Offset1 <= Offset2 && "Caller should have ordered offsets."); in shouldClusterMemOps() 2839 return Offset1 + Width1 == Offset2; in shouldClusterMemOps()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| H A D | ValueTracking.cpp | 7093 auto Offset1 = getOffsetFromIndex(GEP1, Idx, DL); in isPointerOffset() local 7095 if (!Offset1 || !Offset2) in isPointerOffset() 7097 return *Offset2 - *Offset1; in isPointerOffset()
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